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[/] [tcp_socket/] [trunk/] [TCPIP.rst] - Diff between revs 2 and 3

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Configuration
Configuration
=============
=============
 
 
The following parameters can be configured at compile time within source/server.h:
The following parameters can be configured at compile time within source/server.h:
 
 
        + Local Ethernet MAC address
        + Local Ethernet MAC address (default: 0x000102030405)
        + Local IP Address
        + Local IP Address (default: 192.168.1.1)
        + Local TCP Port number
        + Local TCP Port number (default: 80 HTTP)
 
 
Compile
Compile
=======
=======
 
 
Compile into a Verilog module (server.v) using the following command::
Compile into a Verilog module (server.v) using the following command::
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        $ chip2/c2verilog source/server.v
        $ chip2/c2verilog source/server.v
 
 
Interface
Interface
=========
=========
 
 
 
::
 
 
 
                             +-----------+
 
                             |  SERVER   |
 
                             +-----------+
 
      ethernet_rx [15:0] >===>           >===> output_socket [15:0]
 
                             |           |
 
                             |           |
 
      ethernet_tx [15:0] <===<           <===< input_socket [15:0]
 
                             +-----------+
 
 
 
 
Ethernet Interface
Ethernet Interface
------------------
------------------
 
 
The Ethernet interface consists of two streams of data:
The Ethernet interface consists of two streams of data:
 
 

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