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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.29 2001/12/12 09:05:46 mohor
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// LSR status bit 0 was not cleared correctly in case of reseting the FCR (rx fifo).
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//
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// Revision 1.28 2001/12/10 19:52:41 gorban
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// Revision 1.28 2001/12/10 19:52:41 gorban
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// Scratch register added
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// Scratch register added
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//
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//
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// Revision 1.27 2001/12/06 14:51:04 gorban
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// Revision 1.27 2001/12/06 14:51:04 gorban
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// Bug in LSR[0] is fixed.
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// Bug in LSR[0] is fixed.
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rda_int_pnd && ier[`UART_IE_RDA]; // default operation: remove if masked
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rda_int_pnd && ier[`UART_IE_RDA]; // default operation: remove if masked
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always @(posedge clk or posedge wb_rst_i)
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always @(posedge clk or posedge wb_rst_i)
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if (wb_rst_i) thre_int_pnd <= #1 0;
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if (wb_rst_i) thre_int_pnd <= #1 0;
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else
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else
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thre_int_pnd <= #1 fifo_write || iir_read ? 0 :
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thre_int_pnd <= #1 fifo_write || (iir_read & ~iir[`UART_II_IP] & iir[`UART_II_II] == `UART_II_THRE)? 0 :
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thre_int_rise ? 1 :
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thre_int_rise ? 1 :
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thre_int_pnd && ier[`UART_IE_THRE];
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thre_int_pnd && ier[`UART_IE_THRE];
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always @(posedge clk or posedge wb_rst_i)
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always @(posedge clk or posedge wb_rst_i)
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if (wb_rst_i) ms_int_pnd <= #1 0;
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if (wb_rst_i) ms_int_pnd <= #1 0;
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