| Line 15... |
Line 15... |
You should have received a copy of the GNU General Public License
|
You should have received a copy of the GNU General Public License
|
along with this program; if not, see http://www.gnu.org/licenses/.
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along with this program; if not, see http://www.gnu.org/licenses/.
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!*/
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!*/
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|
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/*
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/*
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Puts everything in the right order together.
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Puts everything together.
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*/
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*/
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|
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#ifndef[ZTEX_H]
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#ifndef[ZTEX_H]
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#define[ZTEX_H]
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#define[ZTEX_H]
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| Line 28... |
Line 28... |
********************************************************************* */
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********************************************************************* */
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#include[ztex-utils.h]
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#include[ztex-utils.h]
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|
|
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/* *********************************************************************
|
/* *********************************************************************
|
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***** EEPROM support and some I2c helper functions ******************
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********************************************************************* */
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#ifneq[EEPROM_DISABLED][1]
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#include[ztex-eeprom.h]
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#endif
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/* *********************************************************************
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***** Flash memory support ******************************************
|
***** Flash memory support ******************************************
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********************************************************************* */
|
********************************************************************* */
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#ifeq[FLASH_ENABLED][1]
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#ifeq[FLASH_ENABLED][1]
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|
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#ifeq[PRODUCT_IS][UFM-1_1]
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#ifeq[PRODUCT_IS][UFM-1_1]
|
|
#define[MMC_PORT][E]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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#elifeq[PRODUCT_IS][UFM-1_2]
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#elifeq[PRODUCT_IS][UFM-1_2]
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#define[MMC_PORT][E]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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|
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#elifeq[PRODUCT_IS][UM-1_0]
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#define[MMC_PORT][C]
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|
#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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#include[ztex-flash1.h]
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|
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#elifeq[PRODUCT_IS][UM-1_10]
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#define[MMC_PORT][C]
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#define[MMC_BIT_CS][4]
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#define[MMC_BIT_DI][5]
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#define[MMC_BIT_DO][7]
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#define[MMC_BIT_CLK][6]
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#include[ztex-flash1.h]
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|
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#else
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#else
|
#warning[FLASH option is not supported by this product]
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#warning[FLASH option is not supported by this product]
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#define[FLASH_ENABLED][0]
|
#define[FLASH_ENABLED][0]
|
#endif
|
#endif
|
#endif
|
#endif
|
|
|
|
|
/* *********************************************************************
|
|
***** EEPROM support and some I2c helper functions ******************
|
|
********************************************************************* */
|
|
#ifneq[EEPROM_DISABLED][1]
|
|
#include[ztex-eeprom.h]
|
|
#endif
|
|
|
|
/* *********************************************************************
|
/* *********************************************************************
|
***** FPGA configuration support ************************************
|
***** FPGA configuration support ************************************
|
********************************************************************* */
|
********************************************************************* */
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#ifeq[PRODUCT_IS][UFM-1_0]
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#ifeq[PRODUCT_IS][UFM-1_0]
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#include[ztex-fpga.h]
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#include[ztex-fpga.h]
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| Line 111... |
Line 139... |
SYNCDELAY;
|
SYNCDELAY;
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]
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]
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|
|
void init_USB ()
|
void init_USB ()
|
{
|
{
|
|
USBCS |= 0x08;
|
|
|
CPUCS = bmBIT4 | bmBIT1;
|
CPUCS = bmBIT4 | bmBIT1;
|
CKCON &= ~7;
|
CKCON &= ~7;
|
|
|
|
#ifeq[PRODUCT_IS][UFM-1_0]
|
|
IOA1 = 1;
|
|
OEA |= bmBIT1;
|
|
#elifeq[PRODUCT_IS][UFM-1_1]
|
IOA1 = 1;
|
IOA1 = 1;
|
OEA |= bmBIT1;
|
OEA |= bmBIT1;
|
|
#elifeq[PRODUCT_IS][UFM-1_2]
|
|
IOA1 = 1;
|
|
OEA |= bmBIT1;
|
|
#endif
|
|
|
EA = 0;
|
EA = 0;
|
|
EUSB = 0;
|
|
|
ENABLE_AVUSB;
|
ENABLE_AVUSB;
|
|
|
INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
|
INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
|
| Line 148... |
Line 186... |
EPIE = 0xff;
|
EPIE = 0xff;
|
|
|
EUSB = 1;
|
EUSB = 1;
|
EA = 1;
|
EA = 1;
|
|
|
USBCS |= 0x08;
|
|
USBCS |= bmBIT7 | bmBIT1;
|
|
wait(500);
|
|
USBCS &= ~0x08;
|
|
wait(500);
|
|
|
|
EP1XCFG(1IN);
|
EP1XCFG(1IN);
|
EP1XCFG(1OUT);
|
EP1XCFG(1OUT);
|
EPXCFG(2);
|
EPXCFG(2);
|
EPXCFG(4);
|
EPXCFG(4);
|
EPXCFG(6);
|
EPXCFG(6);
|
EPXCFG(8);
|
EPXCFG(8);
|
|
|
|
#ifeq[FLASH_ENABLED][1]
|
|
flash_init();
|
|
#endif
|
|
#ifeq[FLASH_BITSTREAM_ENABLED][1]
|
|
fpga_configure_from_flash_init();
|
|
#endif
|
|
|
|
USBCS |= bmBIT7 | bmBIT1;
|
|
wait(250);
|
|
USBCS &= ~0x08;
|
}
|
}
|
|
|
|
|
#endif /* ZTEX_H */
|
#endif /* ZTEX_H */
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No newline at end of file
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No newline at end of file
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