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// Introduced delay into 'fullSpeedRate' in module writeUSBWireData.v. Thus matching
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// Introduced delay into 'fullSpeedRate' in module writeUSBWireData.v. Thus matching
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// data delay with control delay.
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// data delay with control delay.
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// Created new control flow constant DATA_STOP_PRE. This allows PREAMBLE PID to completed
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// Created new control flow constant DATA_STOP_PRE. This allows PREAMBLE PID to completed
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// without SEO (EOP), and ensures line state is left at state J.
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// without SEO (EOP), and ensures line state is left at state J.
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// Prevented PREAMBLE PID from preceding SOF when PREAMBLE is enabled.
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// Prevented PREAMBLE PID from preceding SOF when PREAMBLE is enabled.
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// Version 2.2 - March 18th 2011. Fixed more issues related to accessing low speed device via hub.
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// Added 2 bit delay time from detection of low speed SEO (ie end of packet) to notification of
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// higher level modules. This satisfies USB spec requirement of 2 bit times min turn around time
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// Fixed SOF transmission to avoid collision with incoming ACK response in low speed mode.
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// Fixed possible problem for full speed too.
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// Most significant nibble corresponds to major revision.
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// Most significant nibble corresponds to major revision.
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// Least significant nibble corresponds to minor revision.
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// Least significant nibble corresponds to minor revision.
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`define USBHOSTSLAVE_VERSION_NUM 8'h21
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`define USBHOSTSLAVE_VERSION_NUM 8'h22
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//Host slave common registers
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//Host slave common registers
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`define HOST_SLAVE_CONTROL_REG 1'b0
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`define HOST_SLAVE_CONTROL_REG 1'b0
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`define HOST_SLAVE_VERSION_REG 1'b1
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`define HOST_SLAVE_VERSION_REG 1'b1
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