URL https://opencores.org/ocsvn/versatile_io/versatile_io/trunk

Subversion Repositories versatile_io

[/] [versatile_io/] [trunk/] [rtl/] [verilog/] [top/] [versatile_io_top.v] - Diff between revs 14 and 16

Rev 14	Rev 16
Line 63...	Line 63...
`*/`	`*/`
`uart16750_wb uart0(`	`uart16750_wb uart0(`
`// UART signals`	`// UART signals`
`.rx(uart0_rx_pad_i),`	`.rx(uart0_rx_pad_i),`
`.tx(uart0_tx_pad_o),`	`.tx(uart0_tx_pad_o),`
`.int(uart0_irq),`	`.irq(uart0_irq),`
`// wishbone slave`	`// wishbone slave`
`.wbs_dat_i(tobyte(wbs_sel_i,wbs_dat_i)),`	`.wbs_dat_i(tobyte(wbs_sel_i,wbs_dat_i)),`
`.wbs_adr_i(wbs_adr_i[2:0]),`	`.wbs_adr_i(wbs_adr_i[2:0]),`
`.wbs_we_i(wbs_we_i),`	`.wbs_we_i(wbs_we_i),`
`.wbs_cyc_i(wbs_cyc_i & uart0_cs),`	`.wbs_cyc_i(wbs_cyc_i & uart0_cs),`