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https://opencores.org/ocsvn/wb4pb/wb4pb/trunk
[/] [wb4pb/] [trunk/] [sim/] [hdl/] [picoblaze_wb_uart_tb.v] - Diff between revs 15 and 18
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| Rev 15 |
Rev 18 |
| Line 53... |
Line 53... |
wire uart_rx_si;
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wire uart_rx_si;
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wire uart_tx_so;
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wire uart_tx_so;
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parameter PERIOD = 20;
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parameter PERIOD = 20;
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// system signal generation
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initial begin
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initial begin
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clk = 1'b1;
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clk = 1'b1;
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rst_n = 1'b0;
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rst_n = 1'b0;
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#(PERIOD*2) rst_n = 1'b1;
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#(PERIOD*2) rst_n = 1'b1;
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end
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end
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always #(PERIOD/2) clk = ! clk;
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always #(PERIOD/2) clk = ! clk;
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// simple serial loopback
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// simple serial loopback
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assign uart_rx_si = uart_tx_so;
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assign uart_rx_si = uart_tx_so;
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// design under test instance
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picoblaze_wb_uart dut (
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picoblaze_wb_uart dut (
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.p_rst_n_i(rst_n),
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.p_rst_n_i(rst_n),
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.p_clk_i(clk),
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.p_clk_i(clk),
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.p_uart_rx_si_i(uart_rx_si),
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.p_uart_rx_si_i(uart_rx_si),
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