URL https://opencores.org/ocsvn/wbddr3/wbddr3/trunk

Subversion Repositories wbddr3

[/] [wbddr3/] [trunk/] [bench/] [cpp/] [ddrsdramsim.h] - Diff between revs 4 and 6

Rev 4	Rev 6
Line 62...	Line 62...
`int m_used, m_read, m_data;`	`int m_used, m_read, m_data;`
`unsigned m_addr;`	`unsigned m_addr;`
`};`	`};`

`class DDRSDRAMSIM {`	`class DDRSDRAMSIM {`
`int m_reset_state, m_reset_counts, m_memlen, m_busloc;`	`int m_reset_state, m_reset_counts, m_memlen, m_busloc,`
	`m_clocks_since_refresh, m_nrefresh_issued;`
`unsigned *m_mem;`	`unsigned *m_mem;`
`BANKINFO m_bank[8];`	`BANKINFO m_bank[8];`
`BUSTIMESLOT *m_bus;`	`BUSTIMESLOT *m_bus;`
`int cmd(int,int,int,int);`	`int cmd(int,int,int,int);`
`public:`	`public:`