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[/] [xucpu/] [trunk/] [target/] [Xilinx/] [1k/] [startup_sim.wcfg] - Diff between revs 12 and 41

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Rev 12 Rev 41
?rev1line?
?rev2line?
 
 
 
 
 
   
 
   
 
   
 
      
 
         
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
            
 
         
 
      
 
   
 
   
 
   
 
      clock
 
      clock
 
   
 
   
 
      reset
 
      reset
 
   
 
   
 
      rst
 
      rst
 
   
 
   
 
      clk_out
 
      clk_out
 
   
 
   
 
      pc_out[14:0]
 
      pc_out[14:0]
 
   
 
   
 
      q[14:0]
 
      q[14:0]
 
   
 
   
 
      address_reg_2[9:0]
 
      address_reg_2[9:0]
 
   
 
   
 
      label
 
      q2[15:0]
 
      q2[15:0]
 
      INSTRUCTION
 
   
 
   
 
      label
 
      q[15:0]
 
      q[15:0]
 
      IR_Q
 
   
 
   
 
      label
 
      q[15:0]
 
      q[15:0]
 
      DR_Q
 
   
 
   
 
      curr_state
 
      curr_state
 
   
 
   
 
      pc_src[2:0]
 
      pc_src[2:0]
 
   
 
   
 
      ld_pc
 
      ld_pc
 
   
 
   
 
      ld_ir
 
      ld_ir
 
   
 
   
 
      ld_dp
 
      ld_dp
 
   
 
   
 
      operation[3:0]
 
      operation[3:0]
 
   
 
   
 
      reg_addr_a[3:0]
 
      reg_addr_a[3:0]
 
   
 
   
 
      reg_addr_b[3:0]
 
      reg_addr_b[3:0]
 
   
 
   
 
      reg_src[2:0]
 
      reg_src[2:0]
 
   
 
   
 
      y[15:0]
 
      y[15:0]
 
   
 
   
 
      d[15:0]
 
      d[15:0]
 
   
 
   
 
      reg_wr
 
      reg_wr
 
   
 
   
 
      [0]
 
      reg[0]
 
   
 
   
 
      [1]
 
      reg[1]
 
   
 
   
 
      [2]
 
      reg[2]
 
   
 
   
 
      [3]
 
      reg[3]
 
   
 
   
 
      Memory
 
      label
 
      128 128 255
 
      230 230 230
 
   
 
   
 
      data_address[14:0]
 
      data_address[14:0]
 
   
 
   
 
      databus_write[15:0]
 
      databus_write[15:0]
 
   
 
   
 
      mem_wr
 
      mem_wr
 
   
 
   
 
      bus_sel[2:0]
 
      bus_sel[2:0]
 
   
 
   
 
      gpio_1
 
      gpio_1
 
   
 
   
 
      ena
 
      ena
 
   
 
   
 
      we
 
      we
 
   
 
   
 
      port_out[7:0]
 
      port_out[7:0]
 
   
 
 

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