| Line 114... |
Line 114... |
m_core->o_spi_sck,
|
m_core->o_spi_sck,
|
m_core->o_spi_mosi)&0x02)?1:0;
|
m_core->o_spi_mosi)&0x02)?1:0;
|
#ifdef XULA25
|
#ifdef XULA25
|
sdcard_miso = m_sdcard(m_core->o_sd_cs_n, m_core->o_spi_sck,
|
sdcard_miso = m_sdcard(m_core->o_sd_cs_n, m_core->o_spi_sck,
|
m_core->o_spi_mosi);
|
m_core->o_spi_mosi);
|
|
#else
|
|
sdcard_miso = 1;
|
#endif
|
#endif
|
|
|
if ((m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
|
if ((m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
|
m_core->i_spi_miso = 1;
|
m_core->i_spi_miso = 1;
|
else if ((!m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
|
else if ((!m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
|
| Line 136... |
Line 138... |
|
|
m_core->i_rx_uart = m_uart(m_core->o_tx_uart,
|
m_core->i_rx_uart = m_uart(m_core->o_tx_uart,
|
m_core->v__DOT__serialport__DOT__r_setup);
|
m_core->v__DOT__serialport__DOT__r_setup);
|
PIPECMDR::tick();
|
PIPECMDR::tick();
|
|
|
// #define DEBUGGING_OUTPUT
|
#define DEBUGGING_OUTPUT
|
#ifdef DEBUGGING_OUTPUT
|
#ifdef DEBUGGING_OUTPUT
|
bool writeout = false;
|
bool writeout = false;
|
/*
|
/*
|
if (m_core->v__DOT__sdram__DOT__r_pending)
|
if (m_core->v__DOT__sdram__DOT__r_pending)
|
writeout = true;
|
writeout = true;
|
| Line 152... |
Line 154... |
writeout = true;
|
writeout = true;
|
else if (m_core->v__DOT__sdram__DOT__bank_active[3])
|
else if (m_core->v__DOT__sdram__DOT__bank_active[3])
|
writeout = true;
|
writeout = true;
|
*/
|
*/
|
|
|
if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we))
|
// if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we))
|
writeout = true;
|
// writeout = true;
|
/*
|
/*
|
if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we))
|
if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we))
|
writeout = true;
|
writeout = true;
|
if (m_core->v__DOT__genbus__DOT__exec_stb)
|
if (m_core->v__DOT__genbus__DOT__exec_stb)
|
writeout = true;
|
writeout = true;
|
*/
|
*/
|
|
|
if ((m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction_decoder__DOT__genblk3__DOT__r_early_branch)
|
// if ((m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction_decoder__DOT__genblk3__DOT__r_early_branch)
|
&&(m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction == 0x7883ffff))
|
// &&(m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction == 0x7883ffff))
|
m_busy+=2;
|
// m_busy+=2;
|
else if (m_busy > 0) m_busy--;
|
// else if (m_busy > 0) m_busy--;
|
#define v__DOT__wb_addr v__DOT__dwb_addr
|
#define v__DOT__wb_addr v__DOT__dwb_addr
|
#define v__DOT__dwb_stall v__DOT__wb_stall
|
#define v__DOT__dwb_stall v__DOT__wb_stall
|
#define v__DOT__dwb_ack v__DOT__wb_ack
|
#define v__DOT__dwb_ack v__DOT__wb_ack
|
#define v__DOT__wb_cyc v__DOT__dwb_cyc
|
#define v__DOT__wb_cyc v__DOT__dwb_cyc
|
#define v__DOT__wb_stb v__DOT__dwb_stb
|
#define v__DOT__wb_stb v__DOT__dwb_stb
|
| Line 198... |
Line 200... |
unsigned tx_state = ((m_core->v__DOT__serialport__DOT__txmod__DOT__zero_baud_counter)<<20)
|
unsigned tx_state = ((m_core->v__DOT__serialport__DOT__txmod__DOT__zero_baud_counter)<<20)
|
|((m_core->v__DOT__serialport__DOT__txmod__DOT__r_busy)<<16)
|
|((m_core->v__DOT__serialport__DOT__txmod__DOT__r_busy)<<16)
|
|((m_core->v__DOT__serialport__DOT__txmod__DOT__lcl_data)<<8)
|
|((m_core->v__DOT__serialport__DOT__txmod__DOT__lcl_data)<<8)
|
|((m_core->v__DOT__serialport__DOT__txmod__DOT__baud_counter&0x0f)<<4)
|
|((m_core->v__DOT__serialport__DOT__txmod__DOT__baud_counter&0x0f)<<4)
|
|(m_core->v__DOT__serialport__DOT__txmod__DOT__state);
|
|(m_core->v__DOT__serialport__DOT__txmod__DOT__state);
|
if (tx_state != m_last_tx_state)
|
/*
|
writeout = true;
|
if (tx_state != m_last_tx_state)
|
|
writeout = true;
|
|
*/
|
int bus_owner = m_core->v__DOT__wbu_zip_arbiter__DOT__r_a_owner;
|
int bus_owner = m_core->v__DOT__wbu_zip_arbiter__DOT__r_a_owner;
|
bus_owner |= (m_core->v__DOT__wbu_cyc)?2:0;
|
bus_owner |= (m_core->v__DOT__wbu_cyc)?2:0;
|
bus_owner |= (m_core->v__DOT__dwb_cyc)?4:0;
|
bus_owner |= (m_core->v__DOT__dwb_cyc)?4:0;
|
bus_owner |= (m_core->v__DOT__wb_cyc)?8:0;
|
bus_owner |= (m_core->v__DOT__wb_cyc)?8:0;
|
bus_owner |= (m_core->v__DOT__wb_cyc)?16:0;
|
bus_owner |= (m_core->v__DOT__wb_cyc)?16:0;
|
| Line 212... |
Line 216... |
bus_owner |= (m_core->v__DOT__wb_stb)?128:0;
|
bus_owner |= (m_core->v__DOT__wb_stb)?128:0;
|
bus_owner |= (m_core->v__DOT____Vcellinp__wbu_zip_arbiter____pinNumber10)?256:0;
|
bus_owner |= (m_core->v__DOT____Vcellinp__wbu_zip_arbiter____pinNumber10)?256:0;
|
#ifdef XULA25
|
#ifdef XULA25
|
bus_owner |= (m_core->v__DOT__zippy__DOT__ext_cyc)?512:0;
|
bus_owner |= (m_core->v__DOT__zippy__DOT__ext_cyc)?512:0;
|
#endif
|
#endif
|
if (bus_owner != m_last_bus_owner)
|
/*
|
writeout = true;
|
if (bus_owner != m_last_bus_owner)
|
|
writeout = true;
|
|
*/
|
/*
|
/*
|
writeout = (writeout)||(m_core->i_rx_stb)
|
writeout = (writeout)||(m_core->i_rx_stb)
|
||((m_core->o_tx_stb)&&(!m_core->i_tx_busy));
|
||((m_core->o_tx_stb)&&(!m_core->i_tx_busy));
|
writeout = (writeout)||(m_core->v__DOT____Vcellinp__genbus____pinNumber9);
|
writeout = (writeout)||(m_core->v__DOT____Vcellinp__genbus____pinNumber9);
|
writeout = (writeout)||(m_core->v__DOT__wb_stb);
|
writeout = (writeout)||(m_core->v__DOT__wb_stb);
|
| Line 357... |
Line 363... |
printf("|%s%s%s%s%s%s%s%s%s%s",
|
printf("|%s%s%s%s%s%s%s%s%s%s",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid)?"O":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid)?"O":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_ce)?"k":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_ce)?"k":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_stall)?"s":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_stall)?"s":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_illegal)?"i":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_illegal)?"i":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_break)?"B":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_op_break)?"B":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__genblk5__DOT__r_op_lock)?"L":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__genblk5__DOT__r_op_lock)?"L":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_op_pipe)?"P":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_op_pipe)?"P":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__break_pending)?"p":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_break_pending)?"p":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__op_gie)?"G":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_op_gie)?"G":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_alu)?"A":"-");
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_alu)?"A":"-");
|
printf("|%s%s%s%s%s",
|
printf("|%s%s%s%s%s",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_ce)?"a":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_ce)?"a":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_stall)?"s":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_stall)?"s":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__doalu__DOT__genblk2__DOT__r_busy)?"B":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__doalu__DOT__genblk2__DOT__r_busy)?"B":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_gie)?"G":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_alu_gie)?"G":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_alu_illegal)?"i":"-");
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_alu_illegal)?"i":"-");
|
printf("|%s%s%s%2x %s%s%s %2d %2d",
|
printf("|%s%s%s%2x %s%s%s %2d %2d",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_mem)?"M":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_mem)?"M":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_ce)?"m":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_ce)?"m":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__adf_ce_unconditional)?"!":"-",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__adf_ce_unconditional)?"!":"-",
|
| Line 406... |
Line 412... |
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_dcdvalid)?'D':'-',
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__r_dcdvalid)?'D':'-',
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__dcd_pc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__dcd_pc,
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid)?'O':'-',
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid)?'O':'-',
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__op_pc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__op_pc,
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_valid)?'A':'-',
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_valid)?'A':'-',
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_pc);
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__r_alu_pc);
|
|
|
#ifdef XULA25
|
/*
|
// Prefetch debugging
|
// Prefetch debugging
|
printf(" [PC%08x,LST%08x]->[%d%s%s](%d,%08x/%08x)->%08x@%08x",
|
printf(" [PC%08x,LST%08x]->[%d%s%s](%d,%08x/%08x)->%08x@%08x",
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_pc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_pc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__lastpc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__lastpc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__rvsrc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__rvsrc,
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__rvsrc)
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__rvsrc)
|
?((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_pc)?"P":" ")
|
?((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_pc)?"P":" ")
|
:((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_pc)?"p":" "),
|
:((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_pc)?"p":" "),
|
(!m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__rvsrc)
|
(!m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__rvsrc)
|
?((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_last)?"l":" ")
|
?((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_last)?"l":" ")
|
:((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_last)?"L":" "),
|
:((m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_v_from_last)?"L":" "),
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__isrc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__isrc,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_pc_cache,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_pc_cache,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_last_cache,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_last_cache,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction_pc);
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__instruction_pc);
|
#else
|
*/
|
printf(" [PC%08x,R%08x]%s%s%s",
|
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_pc,
|
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__r_addr,
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__w_pc_out_of_bounds)?"OOB":" ",
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__w_running_out_of_cache)?"RUN":" ",
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf__DOT__w_ran_off_end_of_cache)?"END":" ");
|
|
#endif
|
|
|
|
// Decode Stage debugging
|
// Decode Stage debugging
|
// (nothing)
|
// (nothing)
|
|
|
// Op Stage debugging
|
// Op Stage debugging
|
printf(" Op(%02x,%02x->%02x)",
|
// printf(" Op(%02x,%02x->%02x)",
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__dcdOp,
|
// m_core->v__DOT__zippy__DOT__thecpu__DOT__dcdOp,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__opn,
|
// m_core->v__DOT__zippy__DOT__thecpu__DOT__opn,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__opR);
|
// m_core->v__DOT__zippy__DOT__thecpu__DOT__opR);
|
|
|
printf(" %s[%02x]=%08x(%08x)",
|
printf(" %s[%02x]=%08x(%08x)",
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__wr_reg_ce?"WR":"--",
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__wr_reg_ce?"WR":"--",
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__wr_reg_id,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__wr_reg_id,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__wr_gpreg_vl,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__wr_gpreg_vl,
|
| Line 464... |
Line 463... |
#endif
|
#endif
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_reg,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__alu_reg,
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_wreg);
|
m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_wreg);
|
|
|
// domem, the pipelined memory unit debugging
|
// domem, the pipelined memory unit debugging
|
printf(" M[%s@0x%08x]",
|
/*
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_mem)
|
printf(" M[%s@0x%08x]",
|
?((m_core->v__DOT__zippy__DOT__thecpu__DOT__opn&1)?"W":"R")
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__opvalid_mem)
|
:"-",
|
?((m_core->v__DOT__zippy__DOT__thecpu__DOT__opn&1)?"W":"R")
|
|
:"-",
|
|
#ifdef XULA25
|
|
m_core->v__DOT__zippy__DOT__cpu_addr
|
|
#else
|
|
0
|
|
#endif
|
|
);
|
|
*/
|
|
|
|
/*
|
|
printf("%s%s",
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__domem__DOT__cyc)?"B":"-",
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_rdbusy)?"r":"-");
|
|
*/
|
#ifdef XULA25
|
#ifdef XULA25
|
m_core->v__DOT__zippy__DOT__cpu_addr
|
printf(" %s-%s %04x/%04x",
|
|
(m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_any)?"PIC":"pic",
|
|
(m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_gie)?"INT":"( )",
|
|
m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_int_enable,
|
|
m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_int_state);
|
#else
|
#else
|
0
|
printf(" %s-%s %04x/%04x",
|
|
(m_core->v__DOT__runio__DOT__intcontroller__DOT__r_any)?"PIC":"pic",
|
|
(m_core->v__DOT__runio__DOT__intcontroller__DOT__r_gie)?"INT":"( )",
|
|
m_core->v__DOT__runio__DOT__intcontroller__DOT__r_int_enable,
|
|
m_core->v__DOT__runio__DOT__intcontroller__DOT__r_int_state);
|
#endif
|
#endif
|
);
|
|
printf("%s%s",
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__domem__DOT__cyc)?"B":"-",
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__mem_rdbusy)?"r":"-");
|
|
/*
|
/*
|
printf(" %s-%s %04x/%04x",
|
printf(" %s",
|
(m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_any)?"PIC":"pic",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__cc_invalid_for_dcd)?"CCI":" ");
|
(m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_gie)?"INT":"( )",
|
|
m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_int_enable,
|
|
m_core->v__DOT__zippy__DOT__genblk10__DOT__pic__DOT__r_int_state);
|
|
*/
|
*/
|
|
|
|
|
printf(" %s",
|
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__cc_invalid_for_dcd)?"CCI":" ");
|
|
/*
|
/*
|
// Illegal instruction debugging
|
// Illegal instruction debugging
|
printf(" ILL[%s%s%s%s%s%s]",
|
printf(" ILL[%s%s%s%s%s%s]",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_err)?"WB":" ",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_err)?"WB":" ",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_illegal)?"PF":" ",
|
(m_core->v__DOT__zippy__DOT__thecpu__DOT__pf_illegal)?"PF":" ",
|
| Line 579... |
Line 592... |
m_core->v__DOT__sdcard_controller__DOT__fifo_byte&0x0ff);
|
m_core->v__DOT__sdcard_controller__DOT__fifo_byte&0x0ff);
|
*/
|
*/
|
|
|
|
|
/*
|
/*
|
printf(" DMAC[%d]: %08x/%08x/%08x(%03x) -- (%d,%d,%c)%c%c:@%08x-[%4d,%4d/%4d,%4d-#%4d]%08x",
|
printf(" DMAC[%d]: %08x/%08x/%08x(%03x)%d%d%d%d -- (%d,%d,%c)%c%c:@%08x-[%4d,%4d/%4d,%4d-#%4d]%08x",
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_waddr,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_waddr,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_raddr,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_raddr,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_len,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_len,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_blocklen_sub_one,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__cfg_blocklen_sub_one,
|
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_read_request,
|
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_read_ack,
|
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_write_request,
|
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__last_write_ack,
|
m_core->v__DOT__zippy__DOT__dc_cyc,
|
m_core->v__DOT__zippy__DOT__dc_cyc,
|
// m_core->v__DOT__zippy__DOT__dc_stb,
|
// m_core->v__DOT__zippy__DOT__dc_stb,
|
(m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state == 2)?1:0,
|
(m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state == 2)?1:0,
|
|
|
((m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state == 4)
|
((m_core->v__DOT__zippy__DOT__dma_controller__DOT__dma_state == 4)
|
| Line 602... |
Line 619... |
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nread,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nread,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nracks,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nracks,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nwacks,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nwacks,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nwritten,
|
m_core->v__DOT__zippy__DOT__dma_controller__DOT__nwritten,
|
m_core->v__DOT__zippy__DOT__dc_data);
|
m_core->v__DOT__zippy__DOT__dc_data);
|
|
|
printf(" %08x-PIC%08x",
|
|
m_core->v__DOT__zippy__DOT__main_int_vector,
|
|
m_core->v__DOT__zippy__DOT__pic_data);
|
|
*/
|
*/
|
|
|
|
#ifdef OPT_ZIPSYSTEM
|
|
printf(" %08x-PIC%08x",
|
|
m_core->v__DOT__zippy__DOT__main_int_vector,
|
|
m_core->v__DOT__zippy__DOT__pic_data);
|
|
#endif
|
|
|
|
printf(" R0 = %08x", m_core->v__DOT__zippy__DOT__thecpu__DOT__regset[0]);
|
|
|
printf("\n"); fflush(stdout);
|
printf("\n"); fflush(stdout);
|
} m_last_writeout = writeout;
|
} m_last_writeout = writeout;
|
|
|
int writing_to_uart;
|
int writing_to_uart;
|
writing_to_uart = (m_core->v__DOT__wb_stb)
|
writing_to_uart = (m_core->v__DOT__wb_stb)
|
| Line 626... |
Line 647... |
assert((m_core->v__DOT__wb_data & (~0xff))==0);
|
assert((m_core->v__DOT__wb_data & (~0xff))==0);
|
}
|
}
|
#endif // DEBUGGING_OUTPUT
|
#endif // DEBUGGING_OUTPUT
|
}
|
}
|
|
|
|
#ifdef DEBUGGING_OUTPUT
|
bool dcd_ce(void) {
|
bool dcd_ce(void) {
|
if (!m_core->v__DOT__zippy__DOT__thecpu__DOT__r_dcdvalid)
|
if (!m_core->v__DOT__zippy__DOT__thecpu__DOT__r_dcdvalid)
|
return true;
|
return true;
|
if (!m_core->v__DOT__zippy__DOT__thecpu__DOT__op_stall)
|
// if (!m_core->v__DOT__zippy__DOT__thecpu__DOT__op_stall)
|
return true;
|
// return true;
|
return false;
|
return false;
|
}
|
}
|
|
#endif
|
|
|
};
|
};
|
|
|
BUSMASTER_TB *tb;
|
BUSMASTER_TB *tb;
|
|
|
