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## NOTE: This project was designed by me as a part of a student design contest. It is no longer actively supported.
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## NOTE: This project was designed by me as a part of a student design contest. It is no longer actively supported.
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## This project's files are hosted on GitHub.
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## The ZAP ARM Processor (ARMv5T Compatible, FPGA Synthesizable Soft Processor)
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## The ZAP ARM Processor (ARMv5T Compatible, FPGA Synthesizable Soft Processor) @ https://github.com/krevanth/ZAP.git
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### Author : Revanth Kamaraj (revanth91kamaraj@gmail.com)
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### Author : Revanth Kamaraj (revanth91kamaraj@gmail.com)
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### Introduction
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### Introduction
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#### Repos
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#### Repos
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This project is hosted on Github and Opencores.
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This project is hosted on Github.
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GIT: https://github.com/krevanth/ZAP
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GIT: https://github.com/krevanth/ZAP
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SVN: https://opencores.org/projects/zap
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#### Features
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#### Features
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##### ZAP Processor (zap_top.v)
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##### ZAP Processor (zap_top.v)
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The ZAP core is a pipelined ATMv5T processor for FPGA.
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The ZAP core is a pipelined ATMv5T processor for FPGA.
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| input | [31:0] | i_wb_dat | Wishbone B3 signal. |
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| input | [31:0] | i_wb_dat | Wishbone B3 signal. |
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| output | | o_wb_stb_nxt | IGNORE THIS PORT. LEAVE OPEN. |
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| output | | o_wb_stb_nxt | IGNORE THIS PORT. LEAVE OPEN. |
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| output | | o_wb_cyc_nxt | IGNORE THIS PORT. LEAVE OPEN. |
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| output | | o_wb_cyc_nxt | IGNORE THIS PORT. LEAVE OPEN. |
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| output | [31:0] | o_wb_adr_nxt | IGNORE THIS PORT. LEAVE OPEN. |
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| output | [31:0] | o_wb_adr_nxt | IGNORE THIS PORT. LEAVE OPEN. |
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### Directory Structure
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### Installation and Directory Structure (GIT)
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To get the files of the ZAP processor, please execute:
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```bash
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git pull https://github.com/krevanth/ZAP.git
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```
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This should provide the following file structure:
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├── LICENSE
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├── LICENSE
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├── makefile
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├── makefile
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