| Line 489... |
Line 489... |
irqRequest <= '0';
|
irqRequest <= '0';
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mainFSM <= "0000";
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mainFSM <= "0000";
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else
|
else
|
if rising_edge(clk) then
|
if rising_edge(clk) then
|
irq_d <= irq;
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irq_d <= irq;
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if (irq <= '0') and (irq_d = '1') and (flagI = '0') then -- irq falling edge ?
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if (irq = '0') and (irq_d = '1') and (flagI = '0') then -- irq falling edge ?
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irqRequest <= '1';
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irqRequest <= '1';
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end if;
|
end if;
|
case mainFSM is
|
case mainFSM is
|
when "0000" => --############# reset fetch PCH from FFFE
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when "0000" => --############# reset fetch PCH from FFFE
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regPC(15 downto 8) <= datain;
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regPC(15 downto 8) <= datain;
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| Line 557... |
Line 557... |
x"DC" | x"DE" | x"DF" => -- JMP oprx16,X, LDX oprx16,X, STX oprx16,X
|
x"DC" | x"DE" | x"DF" => -- JMP oprx16,X, LDX oprx16,X, STX oprx16,X
|
regPC <= regPC + 1;
|
regPC <= regPC + 1;
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mainFSM <= "0011";
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mainFSM <= "0011";
|
when x"70" | x"71" | x"73" | x"74" | x"76" | x"77" | -- NEG ,X, CBEQ ,X+,rel, COM ,X, LSR ,X, ROR ,X, ASR ,X
|
when x"70" | x"71" | x"73" | x"74" | x"76" | x"77" | -- NEG ,X, CBEQ ,X+,rel, COM ,X, LSR ,X, ROR ,X, ASR ,X
|
x"78" | x"79" | x"7A" | x"7B" | x"7C" | x"7D" | -- LSL ,X, ROL ,X, DEC ,X, DBNZ ,X,rel, INC ,X, TXT ,X
|
x"78" | x"79" | x"7A" | x"7B" | x"7C" | x"7D" | -- LSL ,X, ROL ,X, DEC ,X, DBNZ ,X,rel, INC ,X, TXT ,X
|
x"7E" => -- MOV ,X,opr8a
|
x"7E" => -- MOV ,X+,opr8a
|
addrMux <= addrHX;
|
addrMux <= addrHX;
|
regPC <= regPC + 1;
|
regPC <= regPC + 1;
|
mainFSM <= "0100";
|
mainFSM <= "0100";
|
when x"A0" | x"A1" | x"A2" | x"A3" | -- SUB #opr8i, CMP #opr8i, SBC #opr8i, CPX #opr8i
|
when x"A0" | x"A1" | x"A2" | x"A3" | -- SUB #opr8i, CMP #opr8i, SBC #opr8i, CPX #opr8i
|
x"A4" | x"A5" | x"A6" | x"A7" | -- AND #opr8i, BIT #opr8i, LDA #opr8i, AIS
|
x"A4" | x"A5" | x"A6" | x"A7" | -- AND #opr8i, BIT #opr8i, LDA #opr8i, AIS
|
| Line 1897... |
Line 1897... |
end if;
|
end if;
|
when x"75" => -- CPHX opr
|
when x"75" => -- CPHX opr
|
help <= datain;
|
help <= datain;
|
temp <= temp + 1;
|
temp <= temp + 1;
|
mainFSM <= "0101";
|
mainFSM <= "0101";
|
when x"7E" => -- MOV ,X,opr8a
|
when x"7E" => -- MOV ,X+,opr8a
|
help <= datain;
|
help <= datain;
|
temp <= x"0000";
|
temp <= x"0000";
|
addrMux <= addrPC;
|
addrMux <= addrPC;
|
mainFSM <= "0101";
|
mainFSM <= "0101";
|
when x"80" | x"82" => -- RTI, RTT
|
when x"80" | x"82" => -- RTI, RTT
|
| Line 2023... |
Line 2023... |
flagC <= ((not regHX(15)) and help(7)) or
|
flagC <= ((not regHX(15)) and help(7)) or
|
(help(7) and lres(15)) or
|
(help(7) and lres(15)) or
|
(lres(15) and (not help(7)));
|
(lres(15) and (not help(7)));
|
addrMux <= addrPC;
|
addrMux <= addrPC;
|
mainFSM <= "0010";
|
mainFSM <= "0010";
|
when x"7E" => -- MOV ,X,opr8a
|
when x"7E" => -- MOV ,X+,opr8a
|
flagV <= '0';
|
flagV <= '0';
|
flagN <= help(7);
|
flagN <= help(7);
|
if help = x"00" then
|
if help = x"00" then
|
flagZ <= '1';
|
flagZ <= '1';
|
else
|
else
|
| Line 2036... |
Line 2036... |
temp(7 downto 0) <= datain;
|
temp(7 downto 0) <= datain;
|
wr <= CPUwrite;
|
wr <= CPUwrite;
|
dataMux <= outHelp;
|
dataMux <= outHelp;
|
addrMux <= addrTM;
|
addrMux <= addrTM;
|
regPC <= regPC + 1;
|
regPC <= regPC + 1;
|
|
regHX <= regHX + 1;
|
mainFSM <= "0110";
|
mainFSM <= "0110";
|
when x"80" | x"82" => -- RTI, RTT
|
when x"80" | x"82" => -- RTI, RTT
|
regHX(7 downto 0) <= datain;
|
regHX(7 downto 0) <= datain;
|
regSP <= regSP + 1;
|
regSP <= regSP + 1;
|
mainFSM <= "0110";
|
mainFSM <= "0110";
|
| Line 2324... |
Line 2325... |
else
|
else
|
regPC <= regPC + (x"FF" & datain) + x"0001";
|
regPC <= regPC + (x"FF" & datain) + x"0001";
|
end if;
|
end if;
|
end if;
|
end if;
|
mainFSM <= "0010";
|
mainFSM <= "0010";
|
when x"4E" | x"7E" => -- MOV opr8a,opr8a, MOV ,X,opr8a
|
when x"4E" | x"7E" => -- MOV opr8a,opr8a, MOV ,X+,opr8a
|
wr <= CPUread;
|
wr <= CPUread;
|
addrMux <= addrPC;
|
addrMux <= addrPC;
|
mainFSM <= "0010";
|
mainFSM <= "0010";
|
when x"80" | x"82" => -- RTI, RTT
|
when x"80" | x"82" => -- RTI, RTT
|
regPC(15 downto 8) <= datain;
|
regPC(15 downto 8) <= datain;
|
