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[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB2_iwbif.v] - Diff between revs 203 and 209

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Rev 203 Rev 209
Line 29... Line 29...
 */
 */
 
 
module aeMB2_iwbif (/*AUTOARG*/
module aeMB2_iwbif (/*AUTOARG*/
   // Outputs
   // Outputs
   iwb_adr_o, iwb_stb_o, iwb_sel_o, iwb_wre_o, iwb_cyc_o, iwb_tag_o,
   iwb_adr_o, iwb_stb_o, iwb_sel_o, iwb_wre_o, iwb_cyc_o, iwb_tag_o,
   ich_adr, fet_fb, rpc_if, rpc_mx, exc_iwb,
   ich_adr, fet_fb, rpc_if, rpc_ex, rpc_mx, exc_iwb,
   // Inputs
   // Inputs
   iwb_ack_i, iwb_dat_i, ich_hit, msr_ex, hzd_bpc, hzd_fwd,
   iwb_ack_i, iwb_dat_i, ich_hit, msr_ex, hzd_bpc, hzd_fwd, bra_ex,
   bra_ex, bpc_ex, gclk, grst, dena, iena, gpha
   bpc_ex, gclk, grst, dena, iena, gpha
   );
   );
   parameter AEMB_IWB = 32;
   parameter AEMB_IWB = 32;
   parameter AEMB_HTX = 1;
   parameter AEMB_HTX = 1;
 
 
   // Wishbone
   // Wishbone
Line 56... Line 56...
 
 
   // Internal
   // Internal
   output                fet_fb;
   output                fet_fb;
 
 
   output [31:2]         rpc_if,
   output [31:2]         rpc_if,
 
                         rpc_ex,
                         rpc_mx;
                         rpc_mx;
 
 
   input [7:5]           msr_ex;
   input [7:5]           msr_ex;
   input                 hzd_bpc,
   input                 hzd_bpc,
                         hzd_fwd;
                         hzd_fwd;

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