URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [change.log] - Diff between revs 41 and 42

Rev 41	Rev 42
Line 1...	Line 1...
`All notable changes to this project will be documented in this file.`	`All notable changes to this project will be documented in this file.`

	`##[1.8.2] -13-12-2018`
	`## Added`
	`- add latency standard deviation to simulation results graphs`
	`- add Simple message passing demo on 4×4 MPSoC`
	`- add some error flags to NI`
	`## changed`
	`- fix some bugs in NI`
	`- Enable Verilator simulation on MPSoC`


`##[1.8.1] - 30-7-2018`	`##[1.8.1] - 30-7-2018`
`## Added`	`## Added`
`- GUI for setting Linux variables`	`- GUI for setting Linux variables`
`## changed`	`## changed`
`- Support NoC Simulation for packet payload width larger than 32-bits and core number larger than 64.`	`- Support NoC Simulation for packet payload width larger than 32-bits and core number larger than 64.`