URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_noc/] [crossbar.v] - Diff between revs 48 and 56

Rev 48	Rev 56
Line 24...	Line 24...
`** NoC router crosbar module`	`** NoC router crosbar module`
`**`	`**`
`**************************************************************/`	`**************************************************************/`

`module crossbar #(`	`module crossbar #(`
	`parameter NOC_ID=0,`
`parameter TOPOLOGY = "MESH",`	`parameter TOPOLOGY = "MESH",`
`parameter V = 4, // vc_num_per_port`	`parameter V = 4, // vc_num_per_port`
`parameter P = 5, // router port num`	`parameter P = 5, // router port num`
`parameter Fw = 36,`	`parameter Fw = 36,`
`parameter MUX_TYPE="BINARY", //"ONE_HOT" or "BINARY"`	`parameter MUX_TYPE="BINARY", //"ONE_HOT" or "BINARY"`
Line 106...	Line 107...

`/* verilator lint_off WIDTH */`	`/* verilator lint_off WIDTH */`
`if (SSA_EN =="YES")begin :predict //If no output is granted replace the output port with SS port`	`if (SSA_EN =="YES")begin :predict //If no output is granted replace the output port with SS port`
`/* verilator lint_on WIDTH */`	`/* verilator lint_on WIDTH */`
`add_ss_port #(`	`add_ss_port #(`
	`.NOC_ID(NOC_ID),`
`.SW_LOC(i),`	`.SW_LOC(i),`
`.P(P)`	`.P(P)`
`)`	`)`
`ss_port`	`ss_port`
`(`	`(`