URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_noc/] [inout_ports.sv] - Diff between revs 55 and 56

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Rev 55	Rev 56
Line 23...	Line 23...
`** Description:`	`** Description:`
`** NoC router Input/output module`	`** NoC router Input/output module`
`**`	`**`
`**************************************************************/`	`**************************************************************/`

`module inout_ports`	`module inout_ports #(`
`import pronoc_pkg::*;`	`parameter NOC_ID=0,`
`#(`
`parameter P = 5`	`parameter P = 5`
`)`	`) (`
`(`
`current_r_addr,`	`current_r_addr,`
`neighbors_r_addr,`	`neighbors_r_addr,`
`clk,`	`clk,`
`reset,`	`reset,`

Line 86...	Line 84...
`oport_info,`	`oport_info,`
`vsa_ctrl_in,`	`vsa_ctrl_in,`
`smart_ctrl_in`	`smart_ctrl_in`
`);`	`);`

	`NOC_CONF

`localparam`	`localparam`
`PV = V * P,`	`PV = V * P,`
`PVV = PV * V,`	`PVV = PV * V,`
`P_1 = ( SELF_LOOP_EN=="NO")? P-1 : P,`	`P_1 = ( SELF_LOOP_EN=="NO")? P-1 : P,`
Line 162...	Line 161...
`input vsa_ctrl_t vsa_ctrl_in [P-1 : 0];`	`input vsa_ctrl_t vsa_ctrl_in [P-1 : 0];`
`input [CRDTw-1 : 0 ] credit_init_val_in [P-1 : 0][V-1 : 0];`	`input [CRDTw-1 : 0 ] credit_init_val_in [P-1 : 0][V-1 : 0];`
`output [CRDTw-1 : 0 ] credit_init_val_out [P-1 : 0][V-1 : 0];`	`output [CRDTw-1 : 0 ] credit_init_val_out [P-1 : 0][V-1 : 0];`





`wire [PPSw-1 : 0] port_pre_sel;`	`wire [PPSw-1 : 0] port_pre_sel;`
`wire [PV-1 : 0] swap_port_presel;`	`wire [PV-1 : 0] swap_port_presel;`
`wire [PV-1 : 0] reset_ivc_all;`	`wire [PV-1 : 0] reset_ivc_all;`
`wire [PV-1 : 0] sel;`	`wire [PV-1 : 0] sel;`
`wire [PV-1 : 0] ovc_avalable_all;`	`wire [PV-1 : 0] ovc_avalable_all;`
Line 177...	Line 173...
`wire [PV-1 : 0] ivc_num_getting_sw_grant;`	`wire [PV-1 : 0] ivc_num_getting_sw_grant;`

`ssa_ctrl_t ssa_ctrl [P-1 : 0];`	`ssa_ctrl_t ssa_ctrl [P-1 : 0];`


	`input_ports #(`
`input_ports`	`.NOC_ID(NOC_ID),`
`#(`
`.P(P)`	`.P(P)`
`)`	`) the_input_port (`
`the_input_port`
`(`
`.current_r_addr (current_r_addr),`	`.current_r_addr (current_r_addr),`
`.neighbors_r_addr(neighbors_r_addr),`	`.neighbors_r_addr(neighbors_r_addr),`
`.ivc_num_getting_sw_grant (ivc_num_getting_sw_grant ),`	`.ivc_num_getting_sw_grant (ivc_num_getting_sw_grant ),`
`.any_ivc_sw_request_granted_all (any_ivc_sw_request_granted_all),`	`.any_ivc_sw_request_granted_all (any_ivc_sw_request_granted_all),`
`.flit_in_all (flit_in_all),`	`.flit_in_all (flit_in_all),`
Line 221...	Line 214...
`.clk (clk)`	`.clk (clk)`
`);`	`);`


`output_ports #(`	`output_ports #(`
	`.NOC_ID(NOC_ID),`
`.P (P)`	`.P (P)`
`)`	`) output_ports (`
`output_ports`
`(`

`.vsa_ovc_allocated_all (vsa_ovc_allocated_all),`	`.vsa_ovc_allocated_all (vsa_ovc_allocated_all),`
`.flit_is_tail_all (flit_is_tail_all),`	`.flit_is_tail_all (flit_is_tail_all),`
`.dest_port_all (dest_port_all),`	`.dest_port_all (dest_port_all),`
`.nonspec_granted_dest_port_all (nonspec_granted_dest_port_all),`	`.nonspec_granted_dest_port_all (nonspec_granted_dest_port_all),`
`.credit_in_all (credit_in_all),`	`.credit_in_all (credit_in_all),`
Line 257...	Line 248...
`.credit_init_val_in(credit_init_val_in)`	`.credit_init_val_in(credit_init_val_in)`
`);`	`);`


`vc_alloc_request_gen #(`	`vc_alloc_request_gen #(`
	`.NOC_ID(NOC_ID),`
`.P(P)`	`.P(P)`
`)`	`) vc_alloc_req_gen (`
`vc_alloc_req_gen`
`(`
`.ivc_info(ivc_info),`	`.ivc_info(ivc_info),`
`.ovc_avalable_all(ovc_avalable_all),`	`.ovc_avalable_all(ovc_avalable_all),`
`.dest_port_decoded_all(dest_port_all),`	`.dest_port_decoded_all(dest_port_all),`
`.masked_ovc_request_all(masked_ovc_request_all),`	`.masked_ovc_request_all(masked_ovc_request_all),`

Line 309...	Line 299...

`/* verilator lint_off WIDTH */`	`/* verilator lint_off WIDTH */`
`if( SSA_EN =="YES" ) begin : ssa`	`if( SSA_EN =="YES" ) begin : ssa`
`/* verilator lint_on WIDTH */`	`/* verilator lint_on WIDTH */`
`ss_allocator #(`	`ss_allocator #(`
	`.NOC_ID(NOC_ID),`
`.P(P)`	`.P(P)`
`)`	`)`
`the_ssa`	`the_ssa`
`(`	`(`
`.ivc_info(ivc_info),`	`.ivc_info(ivc_info),`
Line 481...	Line 472...
`vc_alloc_request_gen`	`vc_alloc_request_gen`

`************************/`	`************************/`


`module vc_alloc_request_gen`	`module vc_alloc_request_gen #(`
`import pronoc_pkg::*;`	`parameter NOC_ID=0,`
`#(`

`parameter P = 5`	`parameter P = 5`

`)(`	`)(`
`ivc_info,`	`ivc_info,`
`ovc_avalable_all,`	`ovc_avalable_all,`
`dest_port_decoded_all,`	`dest_port_decoded_all,`
`masked_ovc_request_all,`	`masked_ovc_request_all,`
Line 503...	Line 491...
`ivc_num_getting_ovc_grant,`	`ivc_num_getting_ovc_grant,`
`smart_ctrl_in,`	`smart_ctrl_in,`
`ssa_ctrl_in`	`ssa_ctrl_in`
`);`	`);`

	`NOC_CONF

`localparam P_1 = (SELF_LOOP_EN == "NO")? P-1 : P,`	`localparam P_1 = (SELF_LOOP_EN == "NO")? P-1 : P,`
`PV = V * P,`	`PV = V * P,`
`PVV = PV * V,`	`PVV = PV * V,`
`PVP_1 = PV * P_1,`	`PVP_1 = PV * P_1,`
`PVDSTPw= PV * DSTPw;`	`PVDSTPw= PV * DSTPw;`

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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_noc/] [inout_ports.sv] - Diff between revs 55 and 56