URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_noc/] [router_top.sv] - Diff between revs 54 and 56

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Rev 54	Rev 56
Line 8...	Line 8...
`/**`	`/**`
`* Module: router_top`	`* Module: router_top`
`*`	`*`
`* add optional bypass links to two stage router.`	`* add optional bypass links to two stage router.`
`*/`	`*/`
`module router_top`	`module router_top #(`
`import pronoc_pkg::*;`	`parameter NOC_ID=0,`
	`parameter P=5`
`# (`
`parameter P = 5 // router port num`
`)(`	`)(`
`current_r_id,`	`current_r_id,`
`current_r_addr,`	`current_r_addr,`

`chan_in,`	`chan_in,`
Line 24...	Line 22...

`router_event,`	`router_event,`

`clk,`	`clk,`
`reset`	`reset`

`);`	`);`

	`NOC_CONF


`localparam DISABLED =P;`	`localparam DISABLED =P;`

`input [RAw-1 : 0] current_r_addr;`	`input [RAw-1 : 0] current_r_addr;`
`input [31 : 0] current_r_id;`	`input [31 : 0] current_r_id;`
Line 99...	Line 98...
`assign router_event[i].bypassed_num = chan_in[i].smart_chanel.bypassed_num;`	`assign router_event[i].bypassed_num = chan_in[i].smart_chanel.bypassed_num;`
`assign router_event[i].pck_wr_i = chan_in[i].flit_chanel.flit_wr & chan_in[i].flit_chanel.flit.hdr_flag;`	`assign router_event[i].pck_wr_i = chan_in[i].flit_chanel.flit_wr & chan_in[i].flit_chanel.flit.hdr_flag;`
`assign router_event[i].flit_wr_o = chan_out[i].flit_chanel.flit_wr;`	`assign router_event[i].flit_wr_o = chan_out[i].flit_chanel.flit_wr;`
`assign router_event[i].pck_wr_o = chan_out[i].flit_chanel.flit_wr & chan_out[i].flit_chanel.flit.hdr_flag;`	`assign router_event[i].pck_wr_o = chan_out[i].flit_chanel.flit_wr & chan_out[i].flit_chanel.flit.hdr_flag;`
`assign router_event[i].flit_in_bypassed = chan_out[i].smart_chanel.flit_in_bypassed;`	`assign router_event[i].flit_in_bypassed = chan_out[i].smart_chanel.flit_in_bypassed;`
	`ifdef ACTIVE_LOW_RESET_MODE
	`assign router_event[i].active_high_reset = 1'b0;`
	`else
	`assign router_event[i].active_high_reset = 1'b1;`
	`endif
`end`	`end`
`endgenerate`	`endgenerate`






`flit_chanel_t r2_chan_in [P-1 : 0];`	`flit_chanel_t r2_chan_in [P-1 : 0];`
`flit_chanel_t r2_chan_out [P-1 : 0];`	`flit_chanel_t r2_chan_out [P-1 : 0];`

`ivc_info_t ivc_info [P-1 : 0][V-1 : 0];`	`ivc_info_t ivc_info [P-1 : 0][V-1 : 0];`
`ovc_info_t ovc_info [P-1 : 0][V-1 : 0];`	`ovc_info_t ovc_info [P-1 : 0][V-1 : 0];`
Line 141...	Line 140...
`hdr_flit_t hdr_flit_o [P-1 : 0]; // the sent packet header flit info`	`hdr_flit_t hdr_flit_o [P-1 : 0]; // the sent packet header flit info`

`generate`	`generate`
`for (i=0; i`	`for (i=0; i`

	`header_flit_info #(`
	`.NOC_ID(NOC_ID)`
`header_flit_info in_extract(`	`) in_extract(`
`.flit(chan_in[i].flit_chanel.flit),`	`.flit(chan_in[i].flit_chanel.flit),`
`.hdr_flit( hdr_flit_i[i]),`	`.hdr_flit( hdr_flit_i[i]),`
`.data_o()`	`.data_o()`
`);`	`);`

`header_flit_info out_extract(`	`header_flit_info #(`
	`.NOC_ID(NOC_ID)`
	`) out_extract(`
`.flit(chan_out[i].flit_chanel.flit),`	`.flit(chan_out[i].flit_chanel.flit),`
`.hdr_flit( hdr_flit_o[i]),`	`.hdr_flit( hdr_flit_o[i]),`
`.data_o()`	`.data_o()`
`);`	`);`

`if(DEBUG_EN) begin :dbg`	`if(DEBUG_EN) begin :dbg`
`check_flit_chanel_type_is_in_order #(`	`check_flit_chanel_type_is_in_order #(`
`.V(V),`	`.V(V),`
`.PCK_TYPE(PCK_TYPE),`	`.PCK_TYPE(PCK_TYPE),`
`.MIN_PCK_SIZE(MIN_PCK_SIZE)`	`.MIN_PCK_SIZE(MIN_PCK_SIZE)`
`)`	`) IVC_flit_type_check(`
`IVC_flit_type_check`
`(`
`.clk(clk),`	`.clk(clk),`
`.reset(reset),`	`.reset(reset),`
`.hdr_flg_in(chan_in[i].flit_chanel.flit.hdr_flag),`	`.hdr_flg_in(chan_in[i].flit_chanel.flit.hdr_flag),`
`.tail_flg_in(chan_in[i].flit_chanel.flit.tail_flag),`	`.tail_flg_in(chan_in[i].flit_chanel.flit.tail_flag),`
`.flit_in_wr(chan_in[i].flit_chanel.flit_wr),`	`.flit_in_wr(chan_in[i].flit_chanel.flit_wr),`
`.vc_num_in(chan_in[i].flit_chanel.flit.vc)`	`.vc_num_in(chan_in[i].flit_chanel.flit.vc)`
`);`	`);`

`check_pck_size #(`	`check_pck_size #(`
	`.NOC_ID(NOC_ID),`
`.V(V),`	`.V(V),`
`.MIN_PCK_SIZE(MIN_PCK_SIZE),`	`.MIN_PCK_SIZE(MIN_PCK_SIZE),`
`.Fw(Fw),`	`.Fw(Fw),`
`.DAw(DAw),`	`.DAw(DAw),`
`.CAST_TYPE(CAST_TYPE),`	`.CAST_TYPE(CAST_TYPE),`
`.NE(NE),`	`.NE(NE),`
`.B(B),`	`.B(B),`
`.LB(LB)`	`.LB(LB)`
`)`	`) check_pck_siz(`
`check_pck_siz`
`(`
`.clk(clk),`	`.clk(clk),`
`.reset(reset),`	`.reset(reset),`
`.hdr_flg_in(chan_in[i].flit_chanel.flit.hdr_flag),`	`.hdr_flg_in(chan_in[i].flit_chanel.flit.hdr_flag),`
`.tail_flg_in(chan_in[i].flit_chanel.flit.tail_flag),`	`.tail_flg_in(chan_in[i].flit_chanel.flit.tail_flag),`
`.flit_in_wr(chan_in[i].flit_chanel.flit_wr),`	`.flit_in_wr(chan_in[i].flit_chanel.flit_wr),`
`.vc_num_in(chan_in[i].flit_chanel.flit.vc),`	`.vc_num_in(chan_in[i].flit_chanel.flit.vc),`
`.dest_e_addr_in(chan_in[i].flit_chanel.flit.payload[E_DST_MSB : E_DST_LSB])`	`.dest_e_addr_in(chan_in[i].flit_chanel.flit.payload[E_DST_MSB : E_DST_LSB])`
`);`	`);`


`end`	`end`


`end`	`end`
`endgenerate`	`endgenerate`
`// synthesis translate_on`	`// synthesis translate_on`


Line 208...	Line 204...

`wire [V-1 : 0] ovc_locally_requested [P-1 : 0];`	`wire [V-1 : 0] ovc_locally_requested [P-1 : 0];`
`flit_chanel_t ss_flit_chanel [P-1 : 0]; //flit bypass link goes to straight port`	`flit_chanel_t ss_flit_chanel [P-1 : 0]; //flit bypass link goes to straight port`

`router_two_stage #(//r2`	`router_two_stage #(//r2`
	`.NOC_ID(NOC_ID),`
`.P (P)`	`.P (P)`
`)router_ref (`	`)router_ref (`
`.ivc_info (ivc_info),`	`.ivc_info (ivc_info),`
`.ovc_info (ovc_info),`	`.ovc_info (ovc_info),`
`.iport_info (iport_info),`	`.iport_info (iport_info),`
Line 230...	Line 227...
`generate`	`generate`

`if(SMART_EN) begin :smart`	`if(SMART_EN) begin :smart`


`smart_forward_ivc_info`	`smart_forward_ivc_info #(`
`#(`	`.NOC_ID(NOC_ID),`
`.P(P)`	`.P(P)`
`)forward_ivc(`	`)forward_ivc(`
`.ivc_info(ivc_info),`	`.ivc_info(ivc_info),`
`.iport_info(iport_info),`	`.iport_info(iport_info),`
`.oport_info(oport_info),`	`.oport_info(oport_info),`
Line 243...	Line 240...
`.ovc_locally_requested(ovc_locally_requested),`	`.ovc_locally_requested(ovc_locally_requested),`
`.reset(reset),`	`.reset(reset),`
`.clk(clk)`	`.clk(clk)`
`);`	`);`

`smart_bypass_chanels`	`smart_bypass_chanels #(`
`#(`	`.NOC_ID(NOC_ID),`
`.P(P)`	`.P(P)`
`)smart_bypass(`	`)smart_bypass(`
`.ivc_info(ivc_info),`	`.ivc_info(ivc_info),`
`.iport_info(iport_info),`	`.iport_info(iport_info),`
`.oport_info(oport_info),`	`.oport_info(oport_info),`
Line 272...	Line 269...
`end`	`end`
`else begin :smart_en`	`else begin :smart_en`
`assign neighbors_r_addr [i] = chan_in[i].ctrl_chanel.neighbors_r_addr;`	`assign neighbors_r_addr [i] = chan_in[i].ctrl_chanel.neighbors_r_addr;`
`//smart allocator`	`//smart allocator`
`smart_allocator_per_iport #(`	`smart_allocator_per_iport #(`
	`.NOC_ID(NOC_ID),`
`.P (P ),`	`.P (P ),`
`.SW_LOC (i ),`	`.SW_LOC (i ),`
`.SS_PORT_LOC (SS_PORT )`	`.SS_PORT_LOC (SS_PORT )`
`) smart_allocator(`	`) smart_allocator(`
`.clk (clk ),`	`.clk (clk ),`
Line 313...	Line 311...



`// synthesis translate_off`	`// synthesis translate_off`
`//assign chan_out[i].smart_chanel = (smart_chanel[i].requests[0]) ? smart_chanel_new[i] : take ss shifted smart;`	`//assign chan_out[i].smart_chanel = (smart_chanel[i].requests[0]) ? smart_chanel_new[i] : take ss shifted smart;`
`smart_chanel_check check (`	`smart_chanel_check #(`
	`.NOC_ID(NOC_ID)`
	`) check(`
`.flit_chanel(chan_out[i].flit_chanel),`	`.flit_chanel(chan_out[i].flit_chanel),`
`.smart_chanel(chan_out[i].smart_chanel),`	`.smart_chanel(chan_out[i].smart_chanel),`
`.reset(reset),`	`.reset(reset),`
`.clk(clk)`	`.clk(clk)`
`);`	`);`
Line 416...	Line 416...
`endmodule`	`endmodule`



`module router_top_v //to be used as top module in veralator`	`module router_top_v //to be used as top module in veralator`
`import pronoc_pkg::*;`

`# (`	`# (`
`parameter P = 5 // router port num`	`parameter NOC_ID=0,`
	`parameter P=5`
`)(`	`)(`
`current_r_addr,`	`current_r_addr,`
`current_r_id,`	`current_r_id,`

`chan_in,`	`chan_in,`
Line 431...	Line 430...

`router_event,`	`router_event,`

`clk,`	`clk,`
`reset`	`reset`

`);`	`);`


	`NOC_CONF

`input [RAw-1 : 0] current_r_addr;`	`input [RAw-1 : 0] current_r_addr;`
`input [31:0] current_r_id;`	`input [31:0] current_r_id;`

`input smartflit_chanel_t chan_in [P-1 : 0];`	`input smartflit_chanel_t chan_in [P-1 : 0];`
Line 447...	Line 446...

`output router_event_t router_event [P-1 : 0];`	`output router_event_t router_event [P-1 : 0];`


`router_top # (`	`router_top # (`
	`.NOC_ID(NOC_ID),`
`.P(P)`	`.P(P)`
`)`	`) router (`
`router`
`(`
`.current_r_id(current_r_id),`	`.current_r_id(current_r_id),`
`.current_r_addr(current_r_addr),`	`.current_r_addr(current_r_addr),`
`.chan_in (chan_in),`	`.chan_in (chan_in),`
`.chan_out(chan_out),`	`.chan_out(chan_out),`
`.router_event(router_event),`	`.router_event(router_event),`

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_noc/] [router_top.sv] - Diff between revs 54 and 56