Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

**         The ss ports for each input potrt must be different with the rest

**         The ss ports for each input potrt must be different with the rest

**         This result in one clock cycle latency

**         This result in one clock cycle latency

***************************************/

***************************************/

    parameter P = 5

    parameter P = 5

                clk,

                clk,

                reset,

                reset,

                flit_in_wr_all,

                flit_in_wr_all,

        flit_in_all,

        flit_in_all,

        any_ovc_granted_in_outport_all ,

        any_ovc_granted_in_outport_all ,

        ovc_info,

        ovc_info,

        ssa_ctrl_o

        ssa_ctrl_o

   );

   );

    localparam  PV          =   V   *   P,

    localparam  PV          =   V   *   P,

                        VV                      =   V * V,

                        VV                      =   V * V,

                PVV         =   PV  *   V,

                PVV         =   PV  *   V,

                PVDSTPw= PV * DSTPw,

                PVDSTPw= PV * DSTPw,

                PFw         =   P   *   Fw;

                PFw         =   P   *   Fw;

    localparam    DISABLED = P;

    localparam    DISABLED = P;

    input   [PFw-1          :   0]  flit_in_all;

    input   [PFw-1          :   0]  flit_in_all;

    input   [P-1            :   0]  flit_in_wr_all;

    input   [P-1            :   0]  flit_in_wr_all;

    input   [P-1            :   0]  any_ovc_granted_in_outport_all;

    input   [P-1            :   0]  any_ovc_granted_in_outport_all;

    input   [P-1            :   0]  any_ivc_sw_request_granted_all;

    input   [P-1            :   0]  any_ivc_sw_request_granted_all;

            assign   ovc_single_flit_pck_all [i] =  single_flit_pck_all[(SS_PORT*V)+(i%V)];

            assign   ovc_single_flit_pck_all [i] =  single_flit_pck_all[(SS_PORT*V)+(i%V)];

            ssa_per_vc #(

            ssa_per_vc #(

                .SS_PORT(SS_PORT),

                .SS_PORT(SS_PORT),

                .V_GLOBAL(i),

                .V_GLOBAL(i),

                .P(P)

                .P(P)

            )

            )

            the_ssa_per_vc

            the_ssa_per_vc

/*************

/*************

 *  ssa_per_vc

 *  ssa_per_vc

 * ***********/

 * ***********/

    parameter SS_PORT = "WEST",

    parameter SS_PORT = "WEST",

    )

    )

    (

    (

        flit_in_wr,

        flit_in_wr,

        flit_in,

        flit_in,

        any_ovc_granted_in_ss_port,

        any_ovc_granted_in_ss_port,

   );

   );

    //header packet filds width

    //header packet filds width

    localparam  SW_LOC             =V_GLOBAL/V,

    localparam  SW_LOC             =V_GLOBAL/V,

                V_LOCAL            =V_GLOBAL%V;

                V_LOCAL            =V_GLOBAL%V;

    /* verilator lint_off WIDTH */

    /* verilator lint_off WIDTH */

    /* verilator lint_on WIDTH */

    /* verilator lint_on WIDTH */

    input   [Fw-1          :   0]  flit_in;

    input   [Fw-1          :   0]  flit_in;

    wire   condition_1_2_valid;

    wire   condition_1_2_valid;

    wire [DAw-1 : 0]  dest_e_addr_in;

    wire [DAw-1 : 0]  dest_e_addr_in;

    extract_header_flit_info #(

    extract_header_flit_info #(

        .DATA_w(0)

        .DATA_w(0)

        .flit_in(flit_in),

        .flit_in(flit_in),

        .flit_in_wr(flit_in_wr),

        .flit_in_wr(flit_in_wr),

        .class_o(),

        .class_o(),

        .destport_o(destport_in_encoded),

        .destport_o(destport_in_encoded),

        .src_e_addr_o( ),

        .src_e_addr_o( ),

//check destination port is ss

//check destination port is ss

wire ss_port_hdr_flit, ss_port_nonhdr_flit;

wire ss_port_hdr_flit, ss_port_nonhdr_flit;

ssa_check_destport #(

ssa_check_destport #(

    .SW_LOC(SW_LOC),

    .SW_LOC(SW_LOC),

    .P(P),

    .P(P),

    .SS_PORT(SS_PORT)

    .SS_PORT(SS_PORT)

)

)

 check_destport

 check_destport

wire ssa_permited_by_iport;

wire ssa_permited_by_iport;

generate

generate

    assign ssa_permited_by_iport = ss_ovc_ready & (~ivc_request) & condition_1_2_valid;

    assign ssa_permited_by_iport = ss_ovc_ready & (~ivc_request) & condition_1_2_valid;

end else begin : disabled

end else begin : disabled

    assign ssa_permited_by_iport = 1'b0;

    assign ssa_permited_by_iport = 1'b0;

end

end

endmodule

endmodule

    parameter SW_LOC = 0,

    parameter SW_LOC = 0,

    parameter P=5,

    parameter P=5,

    parameter SS_PORT=0

    parameter SS_PORT=0

    destport_encoded, //non header flit dest port

    destport_encoded, //non header flit dest port

    destport_in_encoded, // header flit packet dest port

    destport_in_encoded, // header flit packet dest port

    ss_port_hdr_flit, // asserted if the header incomming flit goes to ss port

    ss_port_hdr_flit, // asserted if the header incomming flit goes to ss port

    ss_port_nonhdr_flit, // assert if the body or tail incomming flit goes to ss port

    ss_port_nonhdr_flit, // assert if the body or tail incomming flit goes to ss port

    dest_e_addr_in,

    dest_e_addr_in,

    hdr_flg

    hdr_flg

//synopsys  translate_on

//synopsys  translate_on

//synthesis translate_on

//synthesis translate_on

);

);

//synthesis translate_off

//synthesis translate_off

//synopsys  translate_off

//synopsys  translate_off

    input clk,   ivc_num_getting_sw_grant, hdr_flg;

    input clk,   ivc_num_getting_sw_grant, hdr_flg;

//synopsys  translate_on

//synopsys  translate_on

//synthesis translate_on

//synthesis translate_on

            add_ss_port

            add_ss_port

If no output is granted replace the output port with ss one

If no output is granted replace the output port with ss one

**************************/

**************************/

    parameter P=5

    parameter P=5

)(

)(

    destport_in,

    destport_in,

    destport_out

    destport_out

);

);

        localparam SS_PORT = strieght_port(P,SW_LOC);

        localparam SS_PORT = strieght_port(P,SW_LOC);

        localparam DISABLED = P;

        localparam DISABLED = P;

    localparam P_1     =   ( SELF_LOOP_EN=="NO")?  P-1 : P;

    localparam P_1     =   ( SELF_LOOP_EN=="NO")?  P-1 : P;

    input  [P_1-1  :   0] destport_in;

    input  [P_1-1  :   0] destport_in;