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import pronoc_pkg::*;
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`include "pronoc_def.v"
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parameter NOC_ID=0;
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`NOC_CONF
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import dpi_int_pkg::*;
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import dpi_int_pkg::*;
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localparam NE = 4*4*2 ;
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module top_dpi_interface (
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module top_dpi_interface (
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input logic clk_i, rst_i ,
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input logic clk_i, rst_i ,
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input logic init_i ,
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input logic init_i ,
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input logic startCom_i ,
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input logic startCom_i ,
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input logic [NE-1:0] NE_ready_all_i ,
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input logic [NE-1:0] NE_ready_all_i ,
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input deliver_t [NE-1:0] pronoc_synfull_del_all_i ,
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input deliver_t [NE-1:0] pronoc_synfull_del_all_i ,
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output req_t [NE-1:0] synfull_pronoc_req_all_o ,
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output req_t [NE-1:0] synfull_pronoc_req_all_o ,
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output logic endCom_o
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output logic endCom_o
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);
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);
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import "DPI-C" function void c_dpi_interface (
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import "DPI-C" function void c_dpi_interface (
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logic startCom ,
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logic startCom ,
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logic getData ,
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logic getData ,
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logic ejectReq ,
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logic ejectReq ,
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logic queueReq ,
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logic queueReq ,
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output logic endCom ,
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output logic endCom ,
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output logic newReq ,
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output logic newReq ,
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output int source_all[NE] ,
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output int source_all[NE] ,
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output int destination_all[NE] ,
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output int destination_all[NE] ,
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output int address_all[NE] ,
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output int address_all[NE] ,
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output int opcode_all[NE] ,
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output int opcode_all[NE] ,
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output int id_all[NE] ,
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output int id_all[NE] ,
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output int valid_all[NE] ,
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output int valid_all[NE] ,
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input int rtrn_pkgid_all[NE] ,
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input int rtrn_pkgid_all[NE] ,
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input int rtrn_valid_all[NE] ,
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input int rtrn_valid_all[NE] ,
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input int NEready_all[NE] ,
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input int NEready_all[NE] ,
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output int size_all[NE] ,
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output int size_all[NE] ,
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input int enqueue_valid[NE] ,
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input int enqueue_valid[NE] ,
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input int enqueue_src[NE] ,
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input int enqueue_src[NE] ,
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input int enqueue_dst[NE] ,
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input int enqueue_dst[NE] ,
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input int enqueue_id[NE] ,
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input int enqueue_id[NE] ,
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input int enqueue_size[NE]
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input int enqueue_size[NE]
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);
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);
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import "DPI-C" function void connection_init(
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import "DPI-C" function void connection_init(
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logic startCom ,
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logic startCom ,
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output logic ready
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output logic ready
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);
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);
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int destination ;
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int destination ;
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int opcode ;
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int opcode ;
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int source ;
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int source ;
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int addr ;
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int addr ;
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int pkgid ;
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int pkgid ;
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int NEready_all[NE] ;
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int NEready_all[NE] ;
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int syn_source_all[NE] ;
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int syn_source_all[NE] ;
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int syn_size_all[NE] ;
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int syn_size_all[NE] ;
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int syn_opcode_all[NE] ;
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int syn_opcode_all[NE] ;
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int syn_destination_all[NE] ;
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int syn_destination_all[NE] ;
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int syn_address_all[NE] ;
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int syn_address_all[NE] ;
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int syn_pkgid_all[NE] ;
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int syn_pkgid_all[NE] ;
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int syn_valid_all[NE] ;
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int syn_valid_all[NE] ;
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int chi_req_pkgid_all[NE] ;
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int chi_req_pkgid_all[NE] ;
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int chi_req_valid_all[NE] ;
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int chi_req_valid_all[NE] ;
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int enqueue_valid[NE];
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int enqueue_valid[NE];
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int enqueue_src[NE] ;
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int enqueue_src[NE] ;
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int enqueue_dst[NE] ;
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int enqueue_dst[NE] ;
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int enqueue_id[NE] ;
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int enqueue_id[NE] ;
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int enqueue_size[NE] ;
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int enqueue_size[NE] ;
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int _enqueue_valid[NE];
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int _enqueue_valid[NE];
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int _enqueue_src[NE] ;
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int _enqueue_src[NE] ;
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int _enqueue_dst[NE] ;
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int _enqueue_dst[NE] ;
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int _enqueue_id[NE] ;
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int _enqueue_id[NE] ;
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int _enqueue_size[NE] ;
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int _enqueue_size[NE] ;
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logic newData ;
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logic newData ;
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logic newReq ;
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logic newReq ;
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logic ready_connection ;
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logic ready_connection ;
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logic eject_req ;
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logic eject_req ;
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logic queue_req ;
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logic queue_req ;
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logic endCom ;
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logic endCom ;
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logic [NE-1:0] valid_check ;
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logic [NE-1:0] valid_check ;
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logic [NE-1:0] queue_check ;
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logic [NE-1:0] queue_check ;
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// socket connection
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// socket connection
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always_ff @(posedge clk_i) begin
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always_ff @(posedge clk_i) begin
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connection_init(
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connection_init(
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init_i,ready_connection
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init_i,ready_connection
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);
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);
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end
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end
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// trace injection
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// trace injection
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always_ff @(posedge clk_i) begin
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always_ff @(posedge clk_i) begin
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c_dpi_interface(
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c_dpi_interface(
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startCom_i&ready_connection ,
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startCom_i&ready_connection ,
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clk_i ,
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clk_i ,
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eject_req ,
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eject_req ,
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queue_req ,
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queue_req ,
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endCom_o ,
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endCom_o ,
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newData ,
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newData ,
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syn_source_all ,
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syn_source_all ,
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syn_destination_all ,
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syn_destination_all ,
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syn_address_all ,
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syn_address_all ,
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syn_opcode_all ,
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syn_opcode_all ,
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syn_pkgid_all ,
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syn_pkgid_all ,
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syn_valid_all ,
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syn_valid_all ,
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chi_req_pkgid_all ,
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chi_req_pkgid_all ,
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chi_req_valid_all ,
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chi_req_valid_all ,
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NEready_all ,
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NEready_all ,
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syn_size_all ,
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syn_size_all ,
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enqueue_valid ,
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enqueue_valid ,
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enqueue_src ,
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enqueue_src ,
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enqueue_dst ,
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enqueue_dst ,
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enqueue_id ,
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enqueue_id ,
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enqueue_size
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enqueue_size
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);
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);
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end
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end
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genvar k;
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genvar k;
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generate
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generate
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for(k=0;k
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for(k=0;k
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//to pronoc
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//to pronoc
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assign synfull_pronoc_req_all_o[k].dest = syn_destination_all[k];
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assign synfull_pronoc_req_all_o[k].dest = syn_destination_all[k];
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assign synfull_pronoc_req_all_o[k].size = syn_size_all[k];
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assign synfull_pronoc_req_all_o[k].size = syn_size_all[k];
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assign synfull_pronoc_req_all_o[k].src = syn_source_all[k];
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assign synfull_pronoc_req_all_o[k].src = syn_source_all[k];
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assign synfull_pronoc_req_all_o[k].id = syn_pkgid_all[k];
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assign synfull_pronoc_req_all_o[k].id = syn_pkgid_all[k];
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assign synfull_pronoc_req_all_o[k].valid = syn_valid_all[k][0] & NE_ready_all_i[k] ;
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assign synfull_pronoc_req_all_o[k].valid = syn_valid_all[k][0] & NE_ready_all_i[k] ;
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//from pronoc
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//from pronoc
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assign chi_req_pkgid_all[k] = pronoc_synfull_del_all_i[k].id ;
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assign chi_req_pkgid_all[k] = pronoc_synfull_del_all_i[k].id ;
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assign chi_req_valid_all[k] = pronoc_synfull_del_all_i[k].valid ;
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assign chi_req_valid_all[k] = pronoc_synfull_del_all_i[k].valid ;
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assign NEready_all[k] = NE_ready_all_i[k] ;
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assign NEready_all[k] = NE_ready_all_i[k] ;
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assign valid_check[k] = pronoc_synfull_del_all_i[k].valid;
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assign valid_check[k] = pronoc_synfull_del_all_i[k].valid;
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assign queue_check[k] = (syn_valid_all[k][0] & !NE_ready_all_i[k]);
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assign queue_check[k] = (syn_valid_all[k][0] & !NE_ready_all_i[k]);
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//to enqueue
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//to enqueue
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assign enqueue_valid[k] = (syn_valid_all[k][0] & !NE_ready_all_i[k]) ? 1 : 0 ;
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assign enqueue_valid[k] = (syn_valid_all[k][0] & !NE_ready_all_i[k]) ? 1 : 0 ;
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assign enqueue_src[k] = syn_source_all[k] ;
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assign enqueue_src[k] = syn_source_all[k] ;
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assign enqueue_dst[k] = syn_destination_all[k] ;
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assign enqueue_dst[k] = syn_destination_all[k] ;
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assign enqueue_id[k] = syn_pkgid_all[k] ;
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assign enqueue_id[k] = syn_pkgid_all[k] ;
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assign enqueue_size[k] = syn_size_all[k] ;
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assign enqueue_size[k] = syn_size_all[k] ;
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//always @* begin
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//always @* begin
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// if(syn_valid_all[k][0] & !NE_ready_all_i[k]) begin
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// if(syn_valid_all[k][0] & !NE_ready_all_i[k]) begin
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// $display ("not injected because the router injector is not ready: %d", syn_pkgid_all[k]);
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// $display ("not injected because the router injector is not ready: %d", syn_pkgid_all[k]);
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// end
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// end
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//end
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//end
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end
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end
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endgenerate
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endgenerate
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assign eject_req = !(valid_check=='0);
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assign eject_req = !(valid_check=='0);
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assign queue_req = !(queue_check=='0);
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assign queue_req = !(queue_check=='0);
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always_ff @ (posedge clk_i) begin
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always_ff @ (posedge clk_i) begin
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if (!rst_i) begin
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if (!rst_i) begin
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_enqueue_valid <= '{default:'0} ;
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_enqueue_valid <= '{default:'0} ;
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_enqueue_src <= '{default:'0} ;
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_enqueue_src <= '{default:'0} ;
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_enqueue_dst <= '{default:'0} ;
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_enqueue_dst <= '{default:'0} ;
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_enqueue_id <= '{default:'0} ;
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_enqueue_id <= '{default:'0} ;
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_enqueue_size <= '{default:'0} ;
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_enqueue_size <= '{default:'0} ;
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end
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end
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else begin
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else begin
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_enqueue_valid <= enqueue_valid ;
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_enqueue_valid <= enqueue_valid ;
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_enqueue_src <= enqueue_src ;
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_enqueue_src <= enqueue_src ;
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_enqueue_dst <= enqueue_dst ;
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_enqueue_dst <= enqueue_dst ;
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_enqueue_id <= enqueue_id ;
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_enqueue_id <= enqueue_id ;
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_enqueue_size <= enqueue_size ;
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_enqueue_size <= enqueue_size ;
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end
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end
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end
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end
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endmodule
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endmodule
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