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/**************************************************************************
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/**************************************************************************
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** WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT ARE LIKELY TO BE
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** WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT ARE LIKELY TO BE
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** OVERWRITTEN AND LOST. Rename this file if you wish to do any modification.
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** OVERWRITTEN AND LOST. Rename this file if you wish to do any modification.
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****************************************************************************/
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****************************************************************************/
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|
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/**********************************************************************
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/**********************************************************************
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** File: /home/alireza/work/git/hca_git/ProNoC/mpsoc/rtl/src_topolgy/custom1/Tcustom1Rcustom_conventional_routing_genvar.v
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** File: /home/alireza/work/git/pronoc/mpsoc/rtl/src_topolgy/custom1/Tcustom1Rcustom_conventional_routing_genvar.v
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**
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**
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** Copyright (C) 2014-2021 Alireza Monemi
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** Copyright (C) 2014-2021 Alireza Monemi
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**
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**
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** This file is part of ProNoC 2.0.0
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** This file is part of ProNoC 2.1.0
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**
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**
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** ProNoC ( stands for Prototype Network-on-chip) is free software:
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** ProNoC ( stands for Prototype Network-on-chip) is free software:
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** you can redistribute it and/or modify it under the terms of the GNU
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** you can redistribute it and/or modify it under the terms of the GNU
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** Lesser General Public License as published by the Free Software Foundation,
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** Lesser General Public License as published by the Free Software Foundation,
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** either version 2 of the License, or (at your option) any later version.
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** either version 2 of the License, or (at your option) any later version.
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**
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**
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** ProNoC is distributed in the hope that it will be useful, but WITHOUT
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** ProNoC is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General
|
** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General
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** Public License for more details.
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** Public License for more details.
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**
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**
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** You should have received a copy of the GNU Lesser General Public
|
** You should have received a copy of the GNU Lesser General Public
|
** License along with ProNoC. If not, see <http:**www.gnu.org/licenses/>.
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** License along with ProNoC. If not, see <http:**www.gnu.org/licenses/>.
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******************************************************************************/
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******************************************************************************/
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module Tcustom1Rcustom_conventional_routing_genvar #(
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module Tcustom1Rcustom_conventional_routing_genvar #(
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parameter RAw = 3,
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parameter RAw = 3,
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parameter EAw = 3,
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parameter EAw = 3,
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parameter DSTPw=4,
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parameter DSTPw=4,
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parameter SRC_E_ADDR=0
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parameter SRC_E_ADDR=0
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)
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)
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(
|
(
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dest_e_addr,
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dest_e_addr,
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destport
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destport
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);
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);
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|
|
input [EAw-1 :0] dest_e_addr;
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input [EAw-1 :0] dest_e_addr;
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output reg [DSTPw-1 :0] destport;
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output reg [DSTPw-1 :0] destport;
|
|
|
|
|
generate
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generate
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|
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if(SRC_E_ADDR == 0) begin : SRC0
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if(SRC_E_ADDR == 0) begin : SRC0
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always@(*)begin
|
always@(*)begin
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destport= 0;
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destport= 0;
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case(dest_e_addr)
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case(dest_e_addr)
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1,2,3,7,10: begin
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1,2,3,7,10: begin
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destport= 1;
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destport= 1;
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end
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end
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4,5,6,8,9,11,12,13,14,15: begin
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4,5,6,8,9,11,12,13,14,15: begin
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destport= 2;
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destport= 2;
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end
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end
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default: begin
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default: begin
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destport= {DSTPw{1'bX}};
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destport= {DSTPw{1'bX}};
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end
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end
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|
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endcase
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endcase
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end
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end
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end//SRC0
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end//SRC0
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|
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if(SRC_E_ADDR == 1) begin : SRC1
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if(SRC_E_ADDR == 1) begin : SRC1
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always@(*)begin
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always@(*)begin
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destport= 0;
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destport= 0;
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case(dest_e_addr)
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case(dest_e_addr)
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0,4,7,8,9,10,12,15: begin
|
0,4,7,8,9,10,12,15: begin
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destport= 1;
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destport= 1;
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end
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end
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2,3,5,6,11,13,14: begin
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2,3,5,6,11,13,14: begin
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destport= 2;
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destport= 2;
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end
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end
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default: begin
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default: begin
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destport= {DSTPw{1'bX}};
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destport= {DSTPw{1'bX}};
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end
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end
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|
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endcase
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endcase
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end
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end
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end//SRC1
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end//SRC1
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|
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if(SRC_E_ADDR == 2) begin : SRC2
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if(SRC_E_ADDR == 2) begin : SRC2
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always@(*)begin
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always@(*)begin
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destport= 0;
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destport= 0;
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case(dest_e_addr)
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case(dest_e_addr)
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3,4,5,6,8,11,13,14,15: begin
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3,4,5,6,8,11,13,14,15: begin
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destport= 1;
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destport= 1;
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end
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end
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0,1,7,9,10,12: begin
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0,1,7,9,10,12: begin
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destport= 2;
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destport= 2;
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end
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end
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default: begin
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default: begin
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destport= {DSTPw{1'bX}};
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destport= {DSTPw{1'bX}};
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end
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end
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endcase
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endcase
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end
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end
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end//SRC2
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end//SRC2
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if(SRC_E_ADDR == 3) begin : SRC3
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if(SRC_E_ADDR == 3) begin : SRC3
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always@(*)begin
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always@(*)begin
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destport= 0;
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destport= 0;
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case(dest_e_addr)
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case(dest_e_addr)
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2,10,11,12: begin
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2,10,11,12: begin
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destport= 1;
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destport= 1;
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end
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end
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0,1,4,5,6,7,8,9,13,14,15: begin
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0,1,4,5,6,7,8,9,13,14,15: begin
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destport= 2;
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destport= 2;
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end
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end
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default: begin
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default: begin
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destport= {DSTPw{1'bX}};
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destport= {DSTPw{1'bX}};
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end
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end
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endcase
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endcase
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end
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end
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end//SRC3
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end//SRC3
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if(SRC_E_ADDR == 4) begin : SRC4
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if(SRC_E_ADDR == 4) begin : SRC4
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always@(*)begin
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always@(*)begin
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destport= 0;
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destport= 0;
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case(dest_e_addr)
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case(dest_e_addr)
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1,6,7,8,10,13: begin
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1,6,7,8,10,13: begin
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destport= 1;
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destport= 1;
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end
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end
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3: begin
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3: begin
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destport= 2;
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destport= 2;
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end
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end
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0,2,5,9,11,12,14,15: begin
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0,2,5,9,11,12,14,15: begin
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destport= 3;
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destport= 3;
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end
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end
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default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
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destport= {DSTPw{1'bX}};
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end
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end
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|
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endcase
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endcase
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end
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end
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end//SRC4
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end//SRC4
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|
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if(SRC_E_ADDR == 5) begin : SRC5
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if(SRC_E_ADDR == 5) begin : SRC5
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always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
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case(dest_e_addr)
|
1,7,8,10,11,12,15: begin
|
1,7,8,10,11,12,15: begin
|
destport= 1;
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destport= 1;
|
end
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end
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2,3,4,6,13,14: begin
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2,3,4,6,13,14: begin
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destport= 2;
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destport= 2;
|
end
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end
|
0,9: begin
|
0,9: begin
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destport= 3;
|
destport= 3;
|
end
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end
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default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
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endcase
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end
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end
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end//SRC5
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end//SRC5
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|
|
if(SRC_E_ADDR == 6) begin : SRC6
|
if(SRC_E_ADDR == 6) begin : SRC6
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
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3,4,13: begin
|
3,4,13: begin
|
destport= 1;
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destport= 1;
|
end
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end
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0,1,2,5,7,8,9,10,11,12,14,15: begin
|
0,1,2,5,7,8,9,10,11,12,14,15: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
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default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
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|
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endcase
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endcase
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end
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end
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end//SRC6
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end//SRC6
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|
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if(SRC_E_ADDR == 7) begin : SRC7
|
if(SRC_E_ADDR == 7) begin : SRC7
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
2,3,4,5,6,8,9,11,12,13,14,15: begin
|
2,3,4,5,6,8,9,11,12,13,14,15: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
0,10: begin
|
0,10: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
1: begin
|
1: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC7
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end//SRC7
|
|
|
if(SRC_E_ADDR == 8) begin : SRC8
|
if(SRC_E_ADDR == 8) begin : SRC8
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
0,4,5,9,10,12: begin
|
0,4,5,9,10,12: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
2,3,6,11,13,14,15: begin
|
2,3,6,11,13,14,15: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
1,7: begin
|
1,7: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC8
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end//SRC8
|
|
|
if(SRC_E_ADDR == 9) begin : SRC9
|
if(SRC_E_ADDR == 9) begin : SRC9
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
1,7,8,10,12: begin
|
1,7,8,10,12: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
2,3,4,5,6,11,13,14,15: begin
|
2,3,4,5,6,11,13,14,15: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
0: begin
|
0: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC9
|
end//SRC9
|
|
|
if(SRC_E_ADDR == 10) begin : SRC10
|
if(SRC_E_ADDR == 10) begin : SRC10
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
2,3,4,5,6,8,9,11,12,13,14,15: begin
|
2,3,4,5,6,8,9,11,12,13,14,15: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
1,7: begin
|
1,7: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
0: begin
|
0: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC10
|
end//SRC10
|
|
|
if(SRC_E_ADDR == 11) begin : SRC11
|
if(SRC_E_ADDR == 11) begin : SRC11
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
0,1,4,5,6,7,8,9,10,12,13,14,15: begin
|
0,1,4,5,6,7,8,9,10,12,13,14,15: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
2: begin
|
2: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
3: begin
|
3: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC11
|
end//SRC11
|
|
|
if(SRC_E_ADDR == 12) begin : SRC12
|
if(SRC_E_ADDR == 12) begin : SRC12
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
2,3,4,5,6,11,13,14,15: begin
|
2,3,4,5,6,11,13,14,15: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
0,9: begin
|
0,9: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
1,7,10: begin
|
1,7,10: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
8: begin
|
8: begin
|
destport= 4;
|
destport= 4;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC12
|
end//SRC12
|
|
|
if(SRC_E_ADDR == 13) begin : SRC13
|
if(SRC_E_ADDR == 13) begin : SRC13
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
3,4: begin
|
3,4: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
6: begin
|
6: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
0,1,2,5,7,8,9,10,11,12,14,15: begin
|
0,1,2,5,7,8,9,10,11,12,14,15: begin
|
destport= 4;
|
destport= 4;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC13
|
end//SRC13
|
|
|
if(SRC_E_ADDR == 14) begin : SRC14
|
if(SRC_E_ADDR == 14) begin : SRC14
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
5,9,12,15: begin
|
5,9,12,15: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
3,4,6,13: begin
|
3,4,6,13: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
0,1,7,8,10: begin
|
0,1,7,8,10: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
2,11: begin
|
2,11: begin
|
destport= 4;
|
destport= 4;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC14
|
end//SRC14
|
|
|
if(SRC_E_ADDR == 15) begin : SRC15
|
if(SRC_E_ADDR == 15) begin : SRC15
|
always@(*)begin
|
always@(*)begin
|
destport= 0;
|
destport= 0;
|
case(dest_e_addr)
|
case(dest_e_addr)
|
1,7,8,10,12: begin
|
1,7,8,10,12: begin
|
destport= 1;
|
destport= 1;
|
end
|
end
|
2,11,14: begin
|
2,11,14: begin
|
destport= 2;
|
destport= 2;
|
end
|
end
|
3,4,6,13: begin
|
3,4,6,13: begin
|
destport= 3;
|
destport= 3;
|
end
|
end
|
0,5,9: begin
|
0,5,9: begin
|
destport= 4;
|
destport= 4;
|
end
|
end
|
default: begin
|
default: begin
|
destport= {DSTPw{1'bX}};
|
destport= {DSTPw{1'bX}};
|
end
|
end
|
|
|
endcase
|
endcase
|
end
|
end
|
end//SRC15
|
end//SRC15
|
|
|
endgenerate
|
endgenerate
|
|
|
|
|
|
|
endmodule
|
endmodule
|
|
|
|
|
