URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_verilator/] [simulator.h] - Diff between revs 54 and 56

Rev 54	Rev 56
Line 126...	Line 126...
`Vtraffic *traffic[NE]; // for synthetic and trace traffic pattern`	`Vtraffic *traffic[NE]; // for synthetic and trace traffic pattern`
`Vpck_inj *pck_inj[NE]; // for netrace`	`Vpck_inj *pck_inj[NE]; // for netrace`



	`unsigned char reset_active_high=1;`

`unsigned int total_rsv_pck_num=0;`	`unsigned int total_rsv_pck_num=0;`
`unsigned int total_sent_pck_num=0;`	`unsigned int total_sent_pck_num=0;`
`unsigned int end_sim_pck_num=0;`	`unsigned int end_sim_pck_num=0;`
`unsigned int sim_end_clk_num;`	`unsigned int sim_end_clk_num;`
Line 186...	Line 186...
`localparam BYPASSw = log2(SMART_NUM);`	`localparam BYPASSw = log2(SMART_NUM);`
`*/`	`*/`



`#define BYPASS_LSB 5`	`#define BYPASS_LSB 6`
`#define FLIT_IN_WR_FLG (1<<4)`	`#define FLIT_IN_WR_FLG (1<<5)`
`#define PCK_IN_WR_FLG (1<<3)`	`#define PCK_IN_WR_FLG (1<<4)`
`#define FLIT_OUT_WR_FLG (1<<2)`	`#define FLIT_OUT_WR_FLG (1<<3)`
`#define PCK_OUT_WR_FLG (1<<1)`	`#define PCK_OUT_WR_FLG (1<<2)`
`#define FLIT_IN_BYPASSED (1<<0)`	`#define FLIT_IN_BYPASSED (1<<1)`
	`#define ACTIVE_HIGH_RST (1<<0)`




`typedef struct router_st_struct {`	`typedef struct router_st_struct {`