OpenCores
URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_verilator/] [synful_wrapper.h] - Diff between revs 54 and 56

Show entire file | Details | Blame | View Log

Rev 54 Rev 56
Line 50... Line 50...
 
 
void synful_eval( ){
void synful_eval( ){
        int i;
        int i;
        unsigned int pronoc_src_id,pronoc_dst_id;
        unsigned int pronoc_src_id,pronoc_dst_id;
 
 
        if((reset==1) || (count_en==0))  return;
        if((reset==reset_active_high) || (count_en==0))  return;
 
 
        if((( synful_cycle > sim_end_clk_num) || (total_sent_pck_num>= end_sim_pck_num )) && synful_packets_left==0 )  simulation_done=1;
        if((( synful_cycle > sim_end_clk_num) || (total_sent_pck_num>= end_sim_pck_num )) && synful_packets_left==0 )  simulation_done=1;
 
 
        // Reset packets remaining check
        // Reset packets remaining check
        synful_packets_left = 0;
        synful_packets_left = 0;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.