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[/] [bustap-jtag/] [trunk/] [rtl/] [altera/] [virtual_jtag_addr_mask.v] - Diff between revs 6 and 9

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Rev 6 Rev 9
Line 11... Line 11...
// Date               : 2012/03/15
// Date               : 2012/03/15
// Description        : addr mask input from debug host via
// Description        : addr mask input from debug host via
//                      Virtual JTAG.
//                      Virtual JTAG.
//**************************************************************
//**************************************************************
 
 
 
`include "../../sim/altera/jtag_sim_define.h"
`timescale 1ns/1ns
`timescale 1ns/1ns
 
 
module virtual_jtag_addr_mask(mask_out0 ,mask_out1 ,mask_out2 ,mask_out3 ,
module virtual_jtag_addr_mask(mask_out0 ,mask_out1 ,mask_out2 ,mask_out3 ,
                              mask_out4 ,mask_out5 ,mask_out6 ,mask_out7 ,
                              mask_out4 ,mask_out5 ,mask_out6 ,mask_out7 ,
                              mask_out8 ,mask_out9 ,mask_out10,mask_out11,
                              mask_out8 ,mask_out9 ,mask_out10,mask_out11,
Line 162... Line 163...
                                .jtag_state_e2ir ());
                                .jtag_state_e2ir ());
        defparam
        defparam
                sld_virtual_jtag_component.sld_auto_instance_index = "NO",
                sld_virtual_jtag_component.sld_auto_instance_index = "NO",
                sld_virtual_jtag_component.sld_instance_index = 1,
                sld_virtual_jtag_component.sld_instance_index = 1,
                sld_virtual_jtag_component.sld_ir_width = 2,
                sld_virtual_jtag_component.sld_ir_width = 2,
                sld_virtual_jtag_component.sld_sim_action = "((1,1,1,2))",
                sld_virtual_jtag_component.sld_sim_action       = `ADDR_SLD_SIM_ACTION,
                sld_virtual_jtag_component.sld_sim_n_scan = 1,
                sld_virtual_jtag_component.sld_sim_n_scan       = `ADDR_SLD_SIM_N_SCAN,
                sld_virtual_jtag_component.sld_sim_total_length = 2;
                sld_virtual_jtag_component.sld_sim_total_length = `ADDR_SLD_SIM_T_LENG;
 
 
endmodule
endmodule
 
 
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