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Subversion Repositories fpuvhdl

[/] [fpuvhdl/] [trunk/] [fpuvhdl/] [adder/] [fpadd_stage3_struct.vhd] - Diff between revs 3 and 4

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Line 1... Line 1... 
-- VHDL Entity HAVOC.FPadd_stage3.interface
 
-- VHDL Entity work.FPadd_stage3.interface
 
--
 
--
 
-- Created by
 
-- Created by
 
-- Guillermo Marcus, gmarcus@ieee.org
 
-- Guillermo Marcus, gmarcus@ieee.org
 
-- using Mentor Graphics FPGA Advantage tools.
 
-- using Mentor Graphics FPGA Advantage tools.
 
--
 
--
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-- Declarations
 
-- Declarations
 
 
 
 
 
END FPadd_stage3 ;
 
END FPadd_stage3 ;
 
 
 
 
 
--
 
--
 
-- VHDL Architecture HAVOC.FPadd_stage3.struct
 
-- VHDL Architecture work.FPadd_stage3.struct
 
--
 
--
 
-- Created by
 
-- Created by
 
-- Guillermo Marcus, gmarcus@ieee.org
 
-- Guillermo Marcus, gmarcus@ieee.org
 
-- using Mentor Graphics FPGA Advantage tools.
 
-- using Mentor Graphics FPGA Advantage tools.
 
--
 
--
Line 55... Line 55... 
 
 
 
 
LIBRARY ieee;
 
LIBRARY ieee;
 
USE ieee.std_logic_1164.all;
 
USE ieee.std_logic_1164.all;
 
USE ieee.std_logic_arith.all;
 
USE ieee.std_logic_arith.all;
 
 
 
 
 
LIBRARY HAVOC;
 
 
 
 
 
 
 
ARCHITECTURE struct OF FPadd_stage3 IS
 
ARCHITECTURE struct OF FPadd_stage3 IS
 
 
 
 
 
   -- Architecture declarations
 
   -- Architecture declarations
 
 
 
 
 
   -- Internal signal declarations
 
   -- Internal signal declarations
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   );
 
   );
 
   END COMPONENT;
 
   END COMPONENT;
 
 
 
 
 
   -- Optional embedded configurations
 
   -- Optional embedded configurations
 
   -- pragma synthesis_off
 
   -- pragma synthesis_off
 
   FOR ALL : FPinvert USE ENTITY HAVOC.FPinvert;
 
   FOR ALL : FPinvert USE ENTITY work.FPinvert;
 
   -- pragma synthesis_on
 
   -- pragma synthesis_on
 
 
 
 
 
 
 
 
 
BEGIN
 
BEGIN
 
   -- Architecture concurrent statements
 
   -- Architecture concurrent statements

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