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URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [Altera/] [ip.hwp.cpu/] [nios_ii_sdram/] [1.0/] [nios_ii_sdram.1.0.xml] - Diff between revs 157 and 188

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Rev 157 Rev 188
Line 464... Line 464...
                                        HIBI_PE_DMA
                                        HIBI_PE_DMA
                                        0x0
                                        0x0
                                        4
                                        4
                                        32
                                        32
                                        reserved
                                        reserved
 
                                        
 
                                                RX_INITIALIZE
 
                                                Initializes the channel
 
                                                0
 
                                                0x0
 
                                                32
 
                                                false
 
                                                write-only
 
                                        
 
                                        
 
                                                CONTROL
 
                                                Control register
 
                                                0
 
                                                0x1
 
                                                32
 
                                                false
 
                                                read-write
 
                                        
 
                                        
 
                                                IRQ_STATUS
 
                                                Read IRQ status and acknoledge interrupts
 
                                                0
 
                                                0x2
 
                                                32
 
                                                false
 
                                                read-write
 
                                        
 
                                        
 
                                                TX_MEM_ADDR
 
                                                Address where data to be sent begins
 
                                                0
 
                                                0x3
 
                                                32
 
                                                false
 
                                                write-only
 
                                        
 
                                        
 
                                                TX_WORDS
 
                                                How many words to send
 
                                                0
 
                                                0x4
 
                                                32
 
                                                false
 
                                                read-only
 
                                        
 
                                        
 
                                                TX_COMM
 
                                                Hibi command to send the data with
 
                                                0
 
                                                0x5
 
                                                32
 
                                                false
 
                                                write-only
 
                                        
 
                                        
 
                                                TX_HIBI_ADDR
 
                                                Hibi address to send the data
 
                                                0
 
                                                0x6
 
                                                32
 
                                                false
 
                                                write-only
 
                                        
 
                                        
 
                                                RX_HIBI_DATA
 
                                                Current data on hibi rx interface
 
                                                0
 
                                                0x7
 
                                                32
 
                                                false
 
                                                read-only
 
                                        
 
                                        
 
                                                RX_MEM_ADDR
 
                                                Address where channel n stores received data
 
                                                0
 
                                                0x8
 
                                                32
 
                                                false
 
                                                read-write
 
                                        
 
                                        
 
                                                RX_WORDS
 
                                                How many words to receive for packet channel n or read
 
                                                0
 
                                                0x9
 
                                                32
 
                                                read-write
 
                                        
 
                                        
 
                                                RX_HIBI_ADDR
 
                                                Hibi address for channel n to listen
 
                                                0
 
                                                0xA
 
                                                32
 
                                                false
 
                                                read-write
 
                                        
                                
                                
                                
                                
                                        JTAG_UART
                                        JTAG_UART
                                        0x4
                                        0x4
                                        4
                                        4
Line 513... Line 611...
                
                
        
        
        
        
                
                
                        hibi_mem_map
                        hibi_mem_map
 
                        
 
                                hibi_addr_block
 
                                0x0
 
                                32
 
                                32
 
                                reserved
 
                        
                        32
                        32
                
                
        
        
        
        
                
                

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