--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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--This file is part of fpga_gpib_controller.
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--
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-- Fpga_gpib_controller is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- Fpga_gpib_controller is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with Fpga_gpib_controller. If not, see <http://www.gnu.org/licenses/>.
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--------------------------------------------------------------------------------
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-- Entity: components
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-- Entity: components
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-- Date: 23:15 10/12/2011
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-- Date: 23:15 10/12/2011
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-- Author: apaluch
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-- Author: Andrzej Paluch
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_1164.ALL;
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package gpibComponents is
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package gpibComponents is
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component if_func_AH is
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component if_func_AH is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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rdy : in std_logic; -- ready for next message
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rdy : in std_logic; -- ready for next message
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tcs : in std_logic; -- take control synchronously
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tcs : in std_logic; -- take control synchronously
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-- state inputs
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-- state inputs
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LACS : in std_logic; -- listener active state
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LACS : in std_logic; -- listener active state
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LADS : in std_logic; -- listener addressed state
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LADS : in std_logic; -- listener addressed state
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-- interface inputs
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-- interface inputs
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ATN : in std_logic; -- attention
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ATN : in std_logic; -- attention
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DAV : in std_logic; -- data accepted
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DAV : in std_logic; -- data accepted
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-- interface outputs
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-- interface outputs
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RFD : out std_logic; -- ready for data
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RFD : out std_logic; -- ready for data
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DAC : out std_logic; -- data accepted
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DAC : out std_logic; -- data accepted
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-- reported state
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-- reported state
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ANRS : out std_logic; -- acceptor not ready state
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ANRS : out std_logic; -- acceptor not ready state
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ACDS : out std_logic -- accept data state
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ACDS : out std_logic -- accept data state
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);
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);
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end component;
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end component;
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component if_func_SH is
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component if_func_SH is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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-- settingd
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-- settingd
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T1 : in std_logic_vector (7 downto 0);
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T1 : in std_logic_vector (7 downto 0);
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-- local commands
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-- local commands
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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nba : in std_logic; -- new byte available
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nba : in std_logic; -- new byte available
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-- state inputs
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-- state inputs
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TACS : in std_logic; -- talker active state
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TACS : in std_logic; -- talker active state
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SPAS : in std_logic; -- seriall poll active state
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SPAS : in std_logic; -- seriall poll active state
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CACS : in std_logic; -- controller active state
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CACS : in std_logic; -- controller active state
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CTRS : in std_logic; -- controller transfer state
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CTRS : in std_logic; -- controller transfer state
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-- interface inputs
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-- interface inputs
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ATN : in std_logic; -- attention
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ATN : in std_logic; -- attention
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DAC : in std_logic; -- data accepted
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DAC : in std_logic; -- data accepted
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RFD : in std_logic; -- ready for data
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RFD : in std_logic; -- ready for data
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-- remote instructions
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-- remote instructions
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DAV : out std_logic; -- data address valid
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DAV : out std_logic; -- data address valid
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-- device outputs
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-- device outputs
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wnc : out std_logic; -- wait for new cycle
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wnc : out std_logic; -- wait for new cycle
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-- reported states
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-- reported states
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STRS : out std_logic; -- source transfer state
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STRS : out std_logic; -- source transfer state
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SDYS : out std_logic -- source delay state
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SDYS : out std_logic -- source delay state
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);
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);
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end component;
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end component;
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component if_func_L_LE is
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component if_func_L_LE is
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port(
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port(
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-- clock
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-- clock
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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-- function settings
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-- function settings
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isLE : in std_logic;
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isLE : in std_logic;
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-- local commands
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-- local commands
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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ltn : in std_logic; -- listen
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ltn : in std_logic; -- listen
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lun : in std_logic; -- local unlisten
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lun : in std_logic; -- local unlisten
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lon : in std_logic; -- listen only
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lon : in std_logic; -- listen only
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-- state inputs
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-- state inputs
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ACDS : in std_logic; -- accept data state (AH)
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ACDS : in std_logic; -- accept data state (AH)
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CACS : in std_logic; -- controller active state (C)
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CACS : in std_logic; -- controller active state (C)
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TPAS : in std_logic; -- talker primary address state (T)
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TPAS : in std_logic; -- talker primary address state (T)
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-- remote commands
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-- remote commands
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ATN : in std_logic; -- attention
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ATN : in std_logic; -- attention
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IFC : in std_logic; -- interface clear
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IFC : in std_logic; -- interface clear
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MLA : in std_logic; -- my listen address
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MLA : in std_logic; -- my listen address
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MTA : in std_logic; -- my talk address
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MTA : in std_logic; -- my talk address
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UNL : in std_logic; -- unlisten
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UNL : in std_logic; -- unlisten
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PCG : in std_logic; -- primary command group
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PCG : in std_logic; -- primary command group
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MSA : in std_logic; -- my secondary address
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MSA : in std_logic; -- my secondary address
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-- reported states
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-- reported states
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LACS : out std_logic; -- listener active state
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LACS : out std_logic; -- listener active state
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LADS : out std_logic; -- listener addressed state
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LADS : out std_logic; -- listener addressed state
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LPAS : out std_logic -- listener primary addressed state
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LPAS : out std_logic -- listener primary addressed state
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;debug1 : out std_logic
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;debug1 : out std_logic
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);
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);
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end component;
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end component;
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component if_func_T_TE is
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component if_func_T_TE is
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port(
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port(
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-- clock
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-- clock
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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-- function settings
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-- function settings
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isTE : in std_logic;
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isTE : in std_logic;
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-- local instruction inputs
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-- local instruction inputs
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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ton : in std_logic; -- talk only
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ton : in std_logic; -- talk only
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endOf : in std_logic; -- end of byte string
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endOf : in std_logic; -- end of byte string
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-- state inputs
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-- state inputs
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ACDS : in std_logic; -- accept data state (AH)
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ACDS : in std_logic; -- accept data state (AH)
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APRS : in std_logic; -- affirmative poll response
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APRS : in std_logic; -- affirmative poll response
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LPAS : in std_logic; -- listener primary state (LE)
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LPAS : in std_logic; -- listener primary state (LE)
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-- remote instruction inputs
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-- remote instruction inputs
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ATN : in std_logic; -- attention
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ATN : in std_logic; -- attention
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IFC : in std_logic; -- interface clear
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IFC : in std_logic; -- interface clear
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SPE : in std_logic; -- serial poll enable
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SPE : in std_logic; -- serial poll enable
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SPD : in std_logic; -- serial poll disable
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SPD : in std_logic; -- serial poll disable
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MTA : in std_logic; -- my talk address
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MTA : in std_logic; -- my talk address
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OTA : in std_logic; -- other talk address
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OTA : in std_logic; -- other talk address
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MLA : in std_logic; -- my listen address
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MLA : in std_logic; -- my listen address
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OSA : in std_logic; -- other secondary address
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OSA : in std_logic; -- other secondary address
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MSA : in std_logic; -- my secondary address
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MSA : in std_logic; -- my secondary address
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PCG : in std_logic; -- primary command group
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PCG : in std_logic; -- primary command group
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-- remote instruction outputs
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-- remote instruction outputs
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END_OF : out std_logic; -- end of data
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END_OF : out std_logic; -- end of data
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RQS : out std_logic; -- data accepted
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RQS : out std_logic; -- data accepted
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DAB : out std_logic; -- data byte
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DAB : out std_logic; -- data byte
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EOS : out std_logic; -- end of string
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EOS : out std_logic; -- end of string
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STB : out std_logic; -- status byte
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STB : out std_logic; -- status byte
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-- local instruction outputs
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-- local instruction outputs
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tac : out std_logic; -- talker active
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tac : out std_logic; -- talker active
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-- reported states
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-- reported states
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SPAS : out std_logic; -- serial poll active state
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SPAS : out std_logic; -- serial poll active state
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TPAS : out std_logic; -- transmitter active state
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TPAS : out std_logic; -- transmitter active state
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TADS : out std_logic; -- talker addressed state
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TADS : out std_logic; -- talker addressed state
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TACS : out std_logic -- talker active state
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TACS : out std_logic -- talker active state
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);
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);
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end component;
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end component;
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component if_func_C is
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component if_func_C is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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gts : in std_logic; -- go to standby
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gts : in std_logic; -- go to standby
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rpp : in std_logic; -- request parallel poll
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rpp : in std_logic; -- request parallel poll
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tcs : in std_logic; -- take control synchronously
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tcs : in std_logic; -- take control synchronously
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tca : in std_logic; -- take control asynchronously
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tca : in std_logic; -- take control asynchronously
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sic : in std_logic; -- send interface clear
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sic : in std_logic; -- send interface clear
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rsc : in std_logic; -- request system control
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rsc : in std_logic; -- request system control
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sre : in std_logic; -- send remote enable
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sre : in std_logic; -- send remote enable
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-- state inputs
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-- state inputs
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TADS : in std_logic; -- talker addressed state (T or TE)
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TADS : in std_logic; -- talker addressed state (T or TE)
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ACDS : in std_logic; -- accept data state (AH)
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ACDS : in std_logic; -- accept data state (AH)
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ANRS : in std_logic; -- acceptor not ready state (AH)
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ANRS : in std_logic; -- acceptor not ready state (AH)
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STRS : in std_logic; -- source transfer state (SH)
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STRS : in std_logic; -- source transfer state (SH)
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SDYS : in std_logic; -- source delay state (SH)
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SDYS : in std_logic; -- source delay state (SH)
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-- command inputs
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-- command inputs
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ATN_in : in std_logic; -- attention
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ATN_in : in std_logic; -- attention
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IFC_in : in std_logic; -- interface clear
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IFC_in : in std_logic; -- interface clear
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TCT_in : in std_logic; -- take control
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TCT_in : in std_logic; -- take control
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SRQ_in : in std_logic; -- service request
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SRQ_in : in std_logic; -- service request
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-- command outputs
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-- command outputs
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ATN_out : out std_logic; -- attention
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ATN_out : out std_logic; -- attention
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IFC_out : out std_logic; -- interface clear
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IFC_out : out std_logic; -- interface clear
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TCT_out : out std_logic; -- take control
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TCT_out : out std_logic; -- take control
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IDY_out : out std_logic; -- identify
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IDY_out : out std_logic; -- identify
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REN_out : out std_logic; -- remote enable
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REN_out : out std_logic; -- remote enable
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-- reported states
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-- reported states
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CACS : out std_logic; -- controller active state
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CACS : out std_logic; -- controller active state
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CTRS : out std_logic; -- controller transfer state
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CTRS : out std_logic; -- controller transfer state
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CSBS : out std_logic; -- controller standby state
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CSBS : out std_logic; -- controller standby state
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CPPS : out std_logic; -- controller parallel poll state
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CPPS : out std_logic; -- controller parallel poll state
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CSRS : out std_logic; -- controller service requested state
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CSRS : out std_logic; -- controller service requested state
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SACS : out std_logic -- system control active state
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SACS : out std_logic -- system control active state
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);
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);
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end component;
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end component;
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component if_func_DC is
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component if_func_DC is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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-- state inputs
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-- state inputs
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LADS : in std_logic; -- listener addressed state (L or LE)
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LADS : in std_logic; -- listener addressed state (L or LE)
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ACDS : in std_logic; -- accept data state (AH)
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ACDS : in std_logic; -- accept data state (AH)
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-- instructions
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-- instructions
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DCL : in std_logic; -- my listen address
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DCL : in std_logic; -- my listen address
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SDC : in std_logic; -- unlisten
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SDC : in std_logic; -- unlisten
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-- local instructions
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-- local instructions
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clr : out std_logic -- clear device
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clr : out std_logic -- clear device
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);
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);
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end component;
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end component;
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component if_func_DT is
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component if_func_DT is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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-- state inputs
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-- state inputs
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LADS : in std_logic; -- listener addressed state (L or LE)
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LADS : in std_logic; -- listener addressed state (L or LE)
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ACDS : in std_logic; -- accept data state (AH)
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ACDS : in std_logic; -- accept data state (AH)
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-- instructions
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-- instructions
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GET : in std_logic; -- group execute trigger
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GET : in std_logic; -- group execute trigger
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-- local instructions
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-- local instructions
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trg : out std_logic -- trigger
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trg : out std_logic -- trigger
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);
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);
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end component;
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end component;
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component if_func_PP is
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component if_func_PP is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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-- settings
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-- settings
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lpeUsed : std_logic;
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lpeUsed : std_logic;
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fixedPpLine : in std_logic_vector (2 downto 0);
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fixedPpLine : in std_logic_vector (2 downto 0);
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-- local commands
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-- local commands
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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lpe : in std_logic; -- local poll enable
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lpe : in std_logic; -- local poll enable
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ist : in std_logic; -- individual status
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ist : in std_logic; -- individual status
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-- state inputs
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-- state inputs
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ACDS : in std_logic; -- accept data state
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ACDS : in std_logic; -- accept data state
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LADS : in std_logic; -- listener address state (L or LE)
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LADS : in std_logic; -- listener address state (L or LE)
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-- data input
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-- data input
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dio_data : in std_logic_vector(3 downto 0); -- byte from data lines
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dio_data : in std_logic_vector(3 downto 0); -- byte from data lines
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-- remote command inputs
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-- remote command inputs
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IDY : in std_logic; -- identify
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IDY : in std_logic; -- identify
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PPE : in std_logic; -- parallel poll enable
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PPE : in std_logic; -- parallel poll enable
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PPD : in std_logic; -- parallel poll disable
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PPD : in std_logic; -- parallel poll disable
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PPC : in std_logic; -- parallel poll configure
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PPC : in std_logic; -- parallel poll configure
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PPU : in std_logic; -- parallel poll unconfigure
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PPU : in std_logic; -- parallel poll unconfigure
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PCG : in std_logic; -- primary command group
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PCG : in std_logic; -- primary command group
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-- remote command outputs
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-- remote command outputs
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PPR : out std_logic; -- paralel poll response
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PPR : out std_logic; -- paralel poll response
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-- PPR command data
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-- PPR command data
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ppBitValue : out std_logic; -- bit value
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ppBitValue : out std_logic; -- bit value
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ppLineNumber : out std_logic_vector (2 downto 0);
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ppLineNumber : out std_logic_vector (2 downto 0);
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-- reported states
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-- reported states
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PPAS : out std_logic -- parallel poll active state
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PPAS : out std_logic -- parallel poll active state
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);
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);
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end component;
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end component;
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component if_func_RL is
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component if_func_RL is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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rtl : in std_logic; -- return to local
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rtl : in std_logic; -- return to local
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-- state inputs
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-- state inputs
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ACDS : in std_logic; -- listener active state (AH)
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ACDS : in std_logic; -- listener active state (AH)
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LADS : in std_logic; -- listener addressed state (L or LE)
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LADS : in std_logic; -- listener addressed state (L or LE)
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-- instructions
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-- instructions
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REN : in std_logic; -- remote enable
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REN : in std_logic; -- remote enable
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LLO : in std_logic; -- local lockout
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LLO : in std_logic; -- local lockout
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MLA : in std_logic; -- my listen address
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MLA : in std_logic; -- my listen address
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GTL : in std_logic; -- go to local
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GTL : in std_logic; -- go to local
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-- reported state
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-- reported state
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LOCS : out std_logic; -- local state
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LOCS : out std_logic; -- local state
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LWLS : out std_logic -- local with lockout state
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LWLS : out std_logic -- local with lockout state
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);
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);
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end component;
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end component;
|
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component if_func_SR is
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component if_func_SR is
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port(
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port(
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-- device inputs
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-- device inputs
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clk : in std_logic; -- clock
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clk : in std_logic; -- clock
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pon : in std_logic; -- power on
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pon : in std_logic; -- power on
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rsv : in std_logic; -- service request
|
rsv : in std_logic; -- service request
|
-- state inputs
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-- state inputs
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SPAS : in std_logic; -- serial poll active state (T or TE)
|
SPAS : in std_logic; -- serial poll active state (T or TE)
|
-- output instructions
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-- output instructions
|
SRQ : out std_logic; -- service request
|
SRQ : out std_logic; -- service request
|
-- reported states
|
-- reported states
|
APRS : out std_logic -- affirmative poll response state
|
APRS : out std_logic -- affirmative poll response state
|
);
|
);
|
end component;
|
end component;
|
|
|
component commandEcoder is
|
component commandEcoder is
|
port (
|
port (
|
-- data
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-- data
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data : in std_logic_vector (7 downto 0);
|
data : in std_logic_vector (7 downto 0);
|
-- status byte
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-- status byte
|
status_byte : in std_logic_vector (7 downto 0);
|
status_byte : in std_logic_vector (7 downto 0);
|
-- PPR command data
|
-- PPR command data
|
ppBitValue : in std_logic;
|
ppBitValue : in std_logic;
|
ppLineNumber : in std_logic_vector (2 downto 0);
|
ppLineNumber : in std_logic_vector (2 downto 0);
|
-- func states
|
-- func states
|
APRS : in std_logic; -- affirmative poll response state
|
APRS : in std_logic; -- affirmative poll response state
|
CACS : in std_logic; -- controller active state (C)
|
CACS : in std_logic; -- controller active state (C)
|
-- commands
|
-- commands
|
ATN : in std_logic;
|
ATN : in std_logic;
|
END_OF : in std_logic;
|
END_OF : in std_logic;
|
IDY : in std_logic;
|
IDY : in std_logic;
|
DAC : in std_logic;
|
DAC : in std_logic;
|
RFD : in std_logic;
|
RFD : in std_logic;
|
DAV : in std_logic;
|
DAV : in std_logic;
|
IFC : in std_logic;
|
IFC : in std_logic;
|
REN : in std_logic;
|
REN : in std_logic;
|
SRQ : in std_logic; -- request for service
|
SRQ : in std_logic; -- request for service
|
DAB : in std_logic;
|
DAB : in std_logic;
|
EOS : in std_logic;
|
EOS : in std_logic;
|
RQS : in std_logic; -- part of STB
|
RQS : in std_logic; -- part of STB
|
STB : in std_logic;
|
STB : in std_logic;
|
TCT : in std_logic;
|
TCT : in std_logic;
|
PPR : in std_logic;
|
PPR : in std_logic;
|
-------------------------------------------
|
-------------------------------------------
|
-- data lines -----------------------------
|
-- data lines -----------------------------
|
-------------------------------------------
|
-------------------------------------------
|
DO : out std_logic_vector (7 downto 0);
|
DO : out std_logic_vector (7 downto 0);
|
output_valid : out std_logic;
|
output_valid : out std_logic;
|
-------------------------------------------
|
-------------------------------------------
|
-- control lines --------------------------
|
-- control lines --------------------------
|
-------------------------------------------
|
-------------------------------------------
|
-- DAV line
|
-- DAV line
|
DAV_line : out std_logic;
|
DAV_line : out std_logic;
|
-- NRFD line
|
-- NRFD line
|
NRFD_line : out std_logic;
|
NRFD_line : out std_logic;
|
-- NDAC line
|
-- NDAC line
|
NDAC_line : out std_logic;
|
NDAC_line : out std_logic;
|
-- ATN line
|
-- ATN line
|
ATN_line : out std_logic;
|
ATN_line : out std_logic;
|
-- EOI line
|
-- EOI line
|
EOI_line : out std_logic;
|
EOI_line : out std_logic;
|
-- SRQ line
|
-- SRQ line
|
SRQ_line : out std_logic;
|
SRQ_line : out std_logic;
|
-- IFC line
|
-- IFC line
|
IFC_line : out std_logic;
|
IFC_line : out std_logic;
|
-- REN line
|
-- REN line
|
REN_line : out std_logic
|
REN_line : out std_logic
|
);
|
);
|
end component;
|
end component;
|
|
|
component commandDecoder is
|
component commandDecoder is
|
port (
|
port (
|
|
|
-------------------------------------------
|
-------------------------------------------
|
-- data lines -----------------------------
|
-- data lines -----------------------------
|
-------------------------------------------
|
-------------------------------------------
|
DI : in std_logic_vector (7 downto 0);
|
DI : in std_logic_vector (7 downto 0);
|
|
|
-------------------------------------------
|
-------------------------------------------
|
-- control lines --------------------------
|
-- control lines --------------------------
|
-------------------------------------------
|
-------------------------------------------
|
-- DAV line
|
-- DAV line
|
DAV_line : in std_logic;
|
DAV_line : in std_logic;
|
-- NRFD line
|
-- NRFD line
|
NRFD_line : in std_logic;
|
NRFD_line : in std_logic;
|
-- NDAC line
|
-- NDAC line
|
NDAC_line : in std_logic;
|
NDAC_line : in std_logic;
|
-- ATN line
|
-- ATN line
|
ATN_line : in std_logic;
|
ATN_line : in std_logic;
|
-- EOI line
|
-- EOI line
|
EOI_line : in std_logic;
|
EOI_line : in std_logic;
|
-- SRQ line
|
-- SRQ line
|
SRQ_line : in std_logic;
|
SRQ_line : in std_logic;
|
-- IFC line
|
-- IFC line
|
IFC_line : in std_logic;
|
IFC_line : in std_logic;
|
-- REN line
|
-- REN line
|
REN_line : in std_logic;
|
REN_line : in std_logic;
|
|
|
-------------------------------------------
|
-------------------------------------------
|
-- internal settiongs ---------------------
|
-- internal settiongs ---------------------
|
-------------------------------------------
|
-------------------------------------------
|
-- eos mark
|
-- eos mark
|
eosMark : in std_logic_vector (7 downto 0);
|
eosMark : in std_logic_vector (7 downto 0);
|
-- eos used
|
-- eos used
|
eosUsed : in std_logic;
|
eosUsed : in std_logic;
|
-- my listen address
|
-- my listen address
|
myListAddr : in std_logic_vector (4 downto 0);
|
myListAddr : in std_logic_vector (4 downto 0);
|
-- my talk address
|
-- my talk address
|
myTalkAddr : in std_logic_vector (4 downto 0);
|
myTalkAddr : in std_logic_vector (4 downto 0);
|
-- secondary address detected
|
-- secondary address detected
|
secAddrDetected : in std_logic;
|
secAddrDetected : in std_logic;
|
|
|
-------------------------------------------
|
-------------------------------------------
|
-- internal states ------------------------
|
-- internal states ------------------------
|
-------------------------------------------
|
-------------------------------------------
|
-- serial poll active state (T or TE)
|
-- serial poll active state (T or TE)
|
SPAS : in std_logic;
|
SPAS : in std_logic;
|
|
|
-------------------------------------------
|
-------------------------------------------
|
-- single line commands -------------------
|
-- single line commands -------------------
|
-------------------------------------------
|
-------------------------------------------
|
-- attention
|
-- attention
|
ATN : out std_logic;
|
ATN : out std_logic;
|
-- data accepted
|
-- data accepted
|
DAC : out std_logic;
|
DAC : out std_logic;
|
-- data valid
|
-- data valid
|
DAV : out std_logic;
|
DAV : out std_logic;
|
-- end
|
-- end
|
END_c : out std_logic;
|
END_c : out std_logic;
|
-- identify
|
-- identify
|
IDY : out std_logic;
|
IDY : out std_logic;
|
-- interface clear
|
-- interface clear
|
IFC : out std_logic;
|
IFC : out std_logic;
|
-- remote enable
|
-- remote enable
|
REN : out std_logic;
|
REN : out std_logic;
|
-- ready for data
|
-- ready for data
|
RFD : out std_logic;
|
RFD : out std_logic;
|
-- service request
|
-- service request
|
SRQ : out std_logic;
|
SRQ : out std_logic;
|
|
|
-------------------------------------------
|
-------------------------------------------
|
-- multi line commands --------------------
|
-- multi line commands --------------------
|
-------------------------------------------
|
-------------------------------------------
|
-- addressed command group
|
-- addressed command group
|
ACG : out std_logic;
|
ACG : out std_logic;
|
-- data byte
|
-- data byte
|
DAB : out std_logic;
|
DAB : out std_logic;
|
-- device clear
|
-- device clear
|
DCL : out std_logic;
|
DCL : out std_logic;
|
-- end of string
|
-- end of string
|
EOS : out std_logic;
|
EOS : out std_logic;
|
-- group execute trigger
|
-- group execute trigger
|
GET : out std_logic;
|
GET : out std_logic;
|
-- go to local
|
-- go to local
|
GTL : out std_logic;
|
GTL : out std_logic;
|
-- listen address group
|
-- listen address group
|
LAG : out std_logic;
|
LAG : out std_logic;
|
-- local lockout
|
-- local lockout
|
LLO : out std_logic;
|
LLO : out std_logic;
|
-- my listen address
|
-- my listen address
|
MLA : out std_logic;
|
MLA : out std_logic;
|
-- my talk address
|
-- my talk address
|
MTA : out std_logic;
|
MTA : out std_logic;
|
-- my secondary address
|
-- my secondary address
|
MSA : out std_logic;
|
MSA : out std_logic;
|
-- null byte
|
-- null byte
|
NUL : out std_logic;
|
NUL : out std_logic;
|
-- other secondary address
|
-- other secondary address
|
OSA : out std_logic;
|
OSA : out std_logic;
|
-- other talk address
|
-- other talk address
|
OTA : out std_logic;
|
OTA : out std_logic;
|
-- primary command group
|
-- primary command group
|
PCG : out std_logic;
|
PCG : out std_logic;
|
-- parallel poll configure
|
-- parallel poll configure
|
PPC : out std_logic;
|
PPC : out std_logic;
|
-- parallel poll enable
|
-- parallel poll enable
|
PPE : out std_logic;
|
PPE : out std_logic;
|
-- parallel poll disable
|
-- parallel poll disable
|
PPD : out std_logic;
|
PPD : out std_logic;
|
-- parallel poll response
|
-- parallel poll response
|
PPR : out std_logic;
|
PPR : out std_logic;
|
-- parallel poll unconfigure
|
-- parallel poll unconfigure
|
PPU : out std_logic;
|
PPU : out std_logic;
|
-- request service
|
-- request service
|
RQS : out std_logic;
|
RQS : out std_logic;
|
-- secondary command group
|
-- secondary command group
|
SCG : out std_logic;
|
SCG : out std_logic;
|
-- selected device clear
|
-- selected device clear
|
SDC : out std_logic;
|
SDC : out std_logic;
|
-- serial poll disable
|
-- serial poll disable
|
SPD : out std_logic;
|
SPD : out std_logic;
|
-- serial poll enable
|
-- serial poll enable
|
SPE : out std_logic;
|
SPE : out std_logic;
|
-- status byte
|
-- status byte
|
STB : out std_logic;
|
STB : out std_logic;
|
-- talk address group
|
-- talk address group
|
TAG : out std_logic;
|
TAG : out std_logic;
|
-- take control
|
-- take control
|
TCT : out std_logic;
|
TCT : out std_logic;
|
-- universal command group
|
-- universal command group
|
UCG : out std_logic;
|
UCG : out std_logic;
|
-- unlisten
|
-- unlisten
|
UNL : out std_logic;
|
UNL : out std_logic;
|
-- untalk
|
-- untalk
|
UNT : out std_logic
|
UNT : out std_logic
|
);
|
);
|
end component;
|
end component;
|
|
|
component SecondaryAddressDecoder is
|
component SecondaryAddressDecoder is
|
port (
|
port (
|
-- secondary address mask
|
-- secondary address mask
|
secAddrMask : in std_logic_vector (31 downto 0);
|
secAddrMask : in std_logic_vector (31 downto 0);
|
-- data input
|
-- data input
|
DI : in std_logic_vector (4 downto 0);
|
DI : in std_logic_vector (4 downto 0);
|
-- secondary address detected
|
-- secondary address detected
|
secAddrDetected : out std_logic
|
secAddrDetected : out std_logic
|
);
|
);
|
end component;
|
end component;
|
|
|
component SecAddrSaver is
|
component SecAddrSaver is
|
port (
|
port (
|
reset : in std_logic;
|
reset : in std_logic;
|
------------------- gpib ----------------------
|
------------------- gpib ----------------------
|
TADS : in std_logic;
|
TADS : in std_logic;
|
TPAS : in std_logic;
|
TPAS : in std_logic;
|
LADS : in std_logic;
|
LADS : in std_logic;
|
LPAS : in std_logic;
|
LPAS : in std_logic;
|
MSA_Dec : in std_logic;
|
MSA_Dec : in std_logic;
|
DI : in std_logic_vector(4 downto 0);
|
DI : in std_logic_vector(4 downto 0);
|
currentSecAddr : out std_logic_vector(4 downto 0)
|
currentSecAddr : out std_logic_vector(4 downto 0)
|
);
|
);
|
end component;
|
end component;
|
|
|
component gpibInterface is port (
|
component gpibInterface is port (
|
clk : in std_logic;
|
clk : in std_logic;
|
reset : std_logic;
|
reset : std_logic;
|
-- application interface
|
-- application interface
|
isLE : in std_logic;
|
isLE : in std_logic;
|
isTE : in std_logic;
|
isTE : in std_logic;
|
lpeUsed : in std_logic;
|
lpeUsed : in std_logic;
|
fixedPpLine : in std_logic_vector (2 downto 0);
|
fixedPpLine : in std_logic_vector (2 downto 0);
|
eosUsed : in std_logic;
|
eosUsed : in std_logic;
|
eosMark : in std_logic_vector (7 downto 0);
|
eosMark : in std_logic_vector (7 downto 0);
|
myListAddr : in std_logic_vector (4 downto 0);
|
myListAddr : in std_logic_vector (4 downto 0);
|
myTalkAddr : in std_logic_vector (4 downto 0);
|
myTalkAddr : in std_logic_vector (4 downto 0);
|
secAddrMask : in std_logic_vector (31 downto 0);
|
secAddrMask : in std_logic_vector (31 downto 0);
|
data : in std_logic_vector (7 downto 0);
|
data : in std_logic_vector (7 downto 0);
|
status_byte : in std_logic_vector (7 downto 0);
|
status_byte : in std_logic_vector (7 downto 0);
|
T1 : in std_logic_vector (7 downto 0);
|
T1 : in std_logic_vector (7 downto 0);
|
-- local commands to interface
|
-- local commands to interface
|
rdy : in std_logic; -- ready for next message (AH)
|
rdy : in std_logic; -- ready for next message (AH)
|
nba : in std_logic; -- new byte available (SH)
|
nba : in std_logic; -- new byte available (SH)
|
ltn : in std_logic; -- listen (L, LE)
|
ltn : in std_logic; -- listen (L, LE)
|
lun : in std_logic; -- local unlisten (L, LE)
|
lun : in std_logic; -- local unlisten (L, LE)
|
lon : in std_logic; -- listen only (L, LE)
|
lon : in std_logic; -- listen only (L, LE)
|
ton : in std_logic; -- talk only (T, TE)
|
ton : in std_logic; -- talk only (T, TE)
|
endOf : in std_logic; -- end of byte string (T, TE)
|
endOf : in std_logic; -- end of byte string (T, TE)
|
gts : in std_logic; -- go to standby (C)
|
gts : in std_logic; -- go to standby (C)
|
rpp : in std_logic; -- request parallel poll (C)
|
rpp : in std_logic; -- request parallel poll (C)
|
tcs : in std_logic; -- take control synchronously (C, AH)
|
tcs : in std_logic; -- take control synchronously (C, AH)
|
tca : in std_logic; -- take control asynchronously (C)
|
tca : in std_logic; -- take control asynchronously (C)
|
sic : in std_logic; -- send interface clear (C)
|
sic : in std_logic; -- send interface clear (C)
|
rsc : in std_logic; -- request system control (C)
|
rsc : in std_logic; -- request system control (C)
|
sre : in std_logic; -- send remote enable (C)
|
sre : in std_logic; -- send remote enable (C)
|
rtl : in std_logic; -- return to local (RL)
|
rtl : in std_logic; -- return to local (RL)
|
rsv : in std_logic; -- request service (SR)
|
rsv : in std_logic; -- request service (SR)
|
ist : in std_logic; -- individual status (PP)
|
ist : in std_logic; -- individual status (PP)
|
lpe : in std_logic; -- local poll enable (PP)
|
lpe : in std_logic; -- local poll enable (PP)
|
|
|
-- local commands from interface
|
-- local commands from interface
|
dvd : out std_logic; -- data valid (AH)
|
dvd : out std_logic; -- data valid (AH)
|
wnc : out std_logic; -- wait for new cycle (SH)
|
wnc : out std_logic; -- wait for new cycle (SH)
|
tac : out std_logic; -- talker active (T, TE)
|
tac : out std_logic; -- talker active (T, TE)
|
lac : out std_logic; -- listener active (L, LE)
|
lac : out std_logic; -- listener active (L, LE)
|
cwrc : out std_logic; -- controller write commands
|
cwrc : out std_logic; -- controller write commands
|
cwrd : out std_logic; -- controller write data
|
cwrd : out std_logic; -- controller write data
|
clr : out std_logic; -- clear device (DC)
|
clr : out std_logic; -- clear device (DC)
|
trg : out std_logic; -- trigger device (DT)
|
trg : out std_logic; -- trigger device (DT)
|
atl : out std_logic; -- addressed to listen (T or TE)
|
atl : out std_logic; -- addressed to listen (T or TE)
|
att : out std_logic; -- addressed to talk(L or LE)
|
att : out std_logic; -- addressed to talk(L or LE)
|
mla : out std_logic; -- my listen addres decoded (L or LE)
|
mla : out std_logic; -- my listen addres decoded (L or LE)
|
lsb : out std_logic; -- last byte
|
lsb : out std_logic; -- last byte
|
spa : out std_logic; -- seriall poll active
|
spa : out std_logic; -- seriall poll active
|
ppr : out std_logic; -- parallel poll ready
|
ppr : out std_logic; -- parallel poll ready
|
sreq : out std_logic; -- service requested
|
sreq : out std_logic; -- service requested
|
isLocal : out std_logic; -- device is local controlled
|
isLocal : out std_logic; -- device is local controlled
|
currentSecAddr : out std_logic_vector (4 downto 0); -- current sec addr
|
currentSecAddr : out std_logic_vector (4 downto 0); -- current sec addr
|
-- interface signals
|
-- interface signals
|
DI : in std_logic_vector (7 downto 0);
|
DI : in std_logic_vector (7 downto 0);
|
DO : out std_logic_vector (7 downto 0);
|
DO : out std_logic_vector (7 downto 0);
|
output_valid : out std_logic;
|
output_valid : out std_logic;
|
-- attention
|
-- attention
|
ATN_in : in std_logic;
|
ATN_in : in std_logic;
|
ATN_out : out std_logic;
|
ATN_out : out std_logic;
|
-- data valid
|
-- data valid
|
DAV_in : in std_logic;
|
DAV_in : in std_logic;
|
DAV_out : out std_logic;
|
DAV_out : out std_logic;
|
-- not ready for data
|
-- not ready for data
|
NRFD_in : in std_logic;
|
NRFD_in : in std_logic;
|
NRFD_out : out std_logic;
|
NRFD_out : out std_logic;
|
-- no data accepted
|
-- no data accepted
|
NDAC_in : in std_logic;
|
NDAC_in : in std_logic;
|
NDAC_out : out std_logic;
|
NDAC_out : out std_logic;
|
-- end or identify
|
-- end or identify
|
EOI_in : in std_logic;
|
EOI_in : in std_logic;
|
EOI_out : out std_logic;
|
EOI_out : out std_logic;
|
-- service request
|
-- service request
|
SRQ_in : in std_logic;
|
SRQ_in : in std_logic;
|
SRQ_out : out std_logic;
|
SRQ_out : out std_logic;
|
-- interface clear
|
-- interface clear
|
IFC_in : in std_logic;
|
IFC_in : in std_logic;
|
IFC_out : out std_logic;
|
IFC_out : out std_logic;
|
-- remote enable
|
-- remote enable
|
REN_in : in std_logic;
|
REN_in : in std_logic;
|
REN_out : out std_logic
|
REN_out : out std_logic
|
;debug1 : out std_logic
|
;debug1 : out std_logic
|
);
|
);
|
end component;
|
end component;
|
|
|
|
|
