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/**************************************
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Author: J.W Tang
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Email: jaytang1987@hotmail.com
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Module: equivalence_resolver
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Date: 2016-04-24
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Copyright (C) 2016 J.W. Tang
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----------------------------
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This file is part of LinkRunCCA.
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LinkRunCCA is free software: you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as
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published by the Free Software Foundation, either version 3 of
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the License, or (at your option) any later version.
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LinkRunCCA is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with LinkRunCCA. If not, see <http://www.gnu.org/licenses/>.
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By using LinkRunCCA in any or associated publication,
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you agree to cite it as:
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Tang, J. W., et al. "A linked list run-length-based single-pass
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connected component analysis for real-time embedded hardware."
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Journal of Real-Time Image Processing: 1-19. 2016.
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doi:10.1007/s11554-016-0590-2.
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***************************************/
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module equivalence_resolver(
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module equivalence_resolver(
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clk,rst,datavalid, //global input
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clk,rst,datavalid, //global input
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A,B,C,D,p,hp,np,tp,dp,fp,fn,dd, //input from other modules
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A,B,C,D,p,hp,np,tp,dp,fp,fn,dd, //input from other modules
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h_we,t_we,n_we,d_we, //output to table (write enable)
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h_we,t_we,n_we,d_we, //output to table (write enable)
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h_waddr,t_waddr,n_waddr,d_waddr, //output to table (write address)
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h_waddr,t_waddr,n_waddr,d_waddr, //output to table (write address)
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