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Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [rtl/] [spi/] [spi_core.v] - Diff between revs 2 and 11

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Rev 2 Rev 11
Line 61... Line 61...
          // line interface
          // line interface
               sck                ,
               sck                ,
               so                 ,
               so                 ,
               si                 ,
               si                 ,
               cs_n
               cs_n
 
 
           );
           );
 
 
 
 
 
 
input               clk                           ;
input               clk                           ;
input               reset_n                       ;
input               reset_n                       ;
 
 
 
 
//---------------------------------
//---------------------------------
// Reg Bus Interface Signal
// Reg Bus Interface Signal
//---------------------------------
//---------------------------------
input               reg_cs                        ;
input               reg_cs                        ;
input               reg_wr                        ;
input               reg_wr                        ;
input [3:0]         reg_addr                      ;
input [3:0]         reg_addr                      ;
input [31:0]        reg_wdata                     ;
input [7:0]         reg_wdata                     ;
input [3:0]         reg_be                        ;
input               reg_be                        ;
 
 
// Outputs
// Outputs
output [31:0]       reg_rdata                     ;
output [7:0]        reg_rdata                     ;
output              reg_ack                       ;
output              reg_ack                       ;
 
 
//-------------------------------------------
//-------------------------------------------
// Line Interface
// Line Interface
//-------------------------------------------
//-------------------------------------------
Line 110... Line 111...
wire  [7:0]         cfg_cs_byte                   ; // cs bit information
wire  [7:0]         cfg_cs_byte                   ; // cs bit information
wire  [31:0]        cfg_datain                    ; // data for transfer
wire  [31:0]        cfg_datain                    ; // data for transfer
wire  [31:0]        cfg_dataout                   ; // data for received
wire  [31:0]        cfg_dataout                   ; // data for received
wire                hware_op_done                 ; // operation done
wire                hware_op_done                 ; // operation done
 
 
spi_if  u_spi_if
spi_if  u_spi_if (
          (
 
          . clk                         (clk                          ),
          . clk                         (clk                          ),
          . reset_n                     (reset_n                      ),
          . reset_n                     (reset_n                      ),
 
 
           // towards ctrl i/f
           // towards ctrl i/f
          . sck_pe                      (sck_pe                       ),
          . sck_pe                      (sck_pe                       ),
Line 131... Line 131...
 
 
          . sck                         (sck                          ),
          . sck                         (sck                          ),
          . so                          (so                           ),
          . so                          (so                           ),
          . si                          (si                           ),
          . si                          (si                           ),
          . cs_n                        (cs_n                         )
          . cs_n                        (cs_n                         )
 
 
           );
           );
 
 
 
 
spi_ctl  u_spi_ctrl
spi_ctl  u_spi_ctrl
       (
       (

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