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[/] [openarty/] [trunk/] [rtl/] [Makefile] - Diff between revs 25 and 30

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Line 44... Line 44...
test: $(VDIRFB)/Venetctrl__ALL.a
test: $(VDIRFB)/Venetctrl__ALL.a
# test: $(VDIRFB)/Vfastmaster__ALL.a
# test: $(VDIRFB)/Vfastmaster__ALL.a
test: $(VDIRFB)/Vbusmaster__ALL.a
test: $(VDIRFB)/Vbusmaster__ALL.a
 
 
CPUDR := cpu
CPUDR := cpu
CPUSOURCESnD := zipcpu.v fastops.v pfcache.v pipemem.v          \
CPUSOURCESnD := zipcpu.v cpuops.v pfcache.v pipemem.v           \
                        pfcache.v ifastdec.v wbpriarbiter.v zipbones.v  \
                        pfcache.v idecode.v wbpriarbiter.v zipbones.v   \
        zipsystem.v zipcounter.v zipjiffies.v ziptimer.v                \
        zipsystem.v zipcounter.v zipjiffies.v ziptimer.v                \
                wbdmac.v icontrol.v wbwatchdog.v
                wbdmac.v icontrol.v wbwatchdog.v busdelay.v cpudefs.v
CPUSOURCES := $(addprefix $(CPUDR)/,$(CPUSOURCESnD))
CPUSOURCES := $(addprefix $(CPUDR)/,$(CPUSOURCESnD))
 
 
JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v                         \
JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v                         \
        wbucompress.v wbudecompress.v wbudeword.v wbuexec.v             \
        wbucompress.v wbudecompress.v wbudeword.v wbuexec.v             \
        wbuidleint.v wbuinput.v wbuoutput.v wbureadcw.v wbusixchar.v    \
        wbuidleint.v wbuinput.v wbuoutput.v wbureadcw.v wbusixchar.v    \
        wbutohex.v
        wbutohex.v
PERIPHERALS:= enetctrl.v fastio.v rtcdate.v rtcgps.v            \
PERIPHERALS:= enetctrl.v enetpackets.v fastio.v rtcdate.v rtcgps.v      \
        rxuart.v txuart.v eqspiflash.v lleqspi.v flash_config.v         \
        rxuart.v txuart.v eqspiflash.v lleqspi.v flash_config.v         \
        wbicapetwo.v sdspi.v gpsclock_tb.v gpsclock.v wboled.v lloled.v \
        wbicapetwo.v sdspi.v gpsclock_tb.v gpsclock.v wboled.v lloled.v \
        wbscopc.v wbscope.v memdev.v wbddrsdram.v
        wbscopc.v wbscope.v memdev.v addepreamble.v addemac.v addecrc.v \
 
        addepad.v rxecrc.v rxepreambl.v rxehwmac.v rxewrite.v
BIGMATH:= bigadd.v bigsmpy.v bigsub.v
BIGMATH:= bigadd.v bigsmpy.v bigsub.v
SOURCES := fastmaster.v builddate.v                                     \
SOURCES := fastmaster.v builddate.v                                     \
        $(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS) $(BIGMATH)
        $(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS) $(BIGMATH)
SLOWSRC := busmaster.v builddate.v                                      \
SLOWSRC := busmaster.v builddate.v                                      \
        $(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS) $(BIGMATH)
        $(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS) $(BIGMATH)

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