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[/] [opencpu32/] [trunk/] [hdl/] [opencpu32/] [ControlUnit.vhd] - Diff between revs 35 and 42

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Rev 35 Rev 42
Line 21... Line 21...
         Port ( reset : in  STD_LOGIC;
         Port ( reset : in  STD_LOGIC;
           clk : in  STD_LOGIC;                                                                                         --! Main system clock
           clk : in  STD_LOGIC;                                                                                         --! Main system clock
           FlagsDp : in  STD_LOGIC_VECTOR (2 downto 0);                          --! Flags comming from the Datapath
           FlagsDp : in  STD_LOGIC_VECTOR (2 downto 0);                          --! Flags comming from the Datapath
           DataDp : in  STD_LOGIC_VECTOR (n downto 0);                           --! Data comming from the Datapath
           DataDp : in  STD_LOGIC_VECTOR (n downto 0);                           --! Data comming from the Datapath
                          outEnDp : out  typeEnDis;                                                                             --! Enable/Disable datapath output
                          outEnDp : out  typeEnDis;                                                                             --! Enable/Disable datapath output
           MuxDp : out  STD_LOGIC_VECTOR (2 downto 0);                           --! Select on datapath data from (Memory, Imediate, RegFileA, RegFileB, AluOut)
           MuxDp : out  dpMuxInputs;                                                                            --! Select on datapath data from (Memory, Imediate, RegFileA, RegFileB, AluOut)
                          MuxRegDp : out STD_LOGIC_VECTOR(1 downto 0);                           --! Select Alu InputA (Memory,Imediate,RegFileA)
                          MuxRegDp : out STD_LOGIC_VECTOR(1 downto 0);                           --! Select Alu InputA (Memory,Imediate,RegFileA)
           ImmDp : out  STD_LOGIC_VECTOR (n downto 0);                           --! Imediate value passed to the Datapath
           ImmDp : out  STD_LOGIC_VECTOR (n downto 0);                           --! Imediate value passed to the Datapath
           DpAluOp : out  aluOps;                                                                                       --! Alu operations
           DpAluOp : out  aluOps;                                                                                       --! Alu operations
                          DpRegFileWriteAddr : out  generalRegisters;                           --! General register address to write
                          DpRegFileWriteAddr : out  generalRegisters;                           --! General register address to write
           DpRegFileWriteEn : out  STD_LOGIC;                                                   --! Enable register write
           DpRegFileWriteEn : out  STD_LOGIC;                                                   --! Enable register write
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                                        nextExState <= initInstructionExecution;
                                        nextExState <= initInstructionExecution;
                                else
                                else
                                        case opcodeIR is
                                        case opcodeIR is
                                        -- MOV r2,r1 (See the testDatapath to see how to drive the datapath for this function)
                                        -- MOV r2,r1 (See the testDatapath to see how to drive the datapath for this function)
                                        when mov_reg =>
                                        when mov_reg =>
                                                MuxDp <= muxPos(fromRegFileB);
                                                MuxDp <= fromRegFileB;
                                                DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg2)));
                                                DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg2)));
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                DpRegFileReadEnB <= '1';
                                                DpRegFileReadEnB <= '1';
                                                nextExState <= writeRegister;
                                                nextExState <= writeRegister;
 
 
                                        -- LOAD r1,10 (Load into r1, the value in the main memory located at address 10)
                                        -- LOAD r1,10 (Load into r1, the value in the main memory located at address 10)
                                        when ld_val =>
                                        when ld_val =>
                                                MuxDp <= muxPos(fromMemory);
                                                MuxDp <= fromMemory;
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                -- The part that interface with the memory is located on the first process
                                                -- The part that interface with the memory is located on the first process
                                                nextExState <= writeRegister;
                                                nextExState <= writeRegister;
 
 
                                        -- STORE r1,10 (Store the value on r1 in the main memory located at address 10)
                                        -- STORE r1,10 (Store the value on r1 in the main memory located at address 10)
                                        when stom_val =>
                                        when stom_val =>
                                        MuxDp <= muxPos(fromRegFileB);
                                        MuxDp <= fromRegFileB;
                                        DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                        DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                        DpRegFileReadEnB <= '1';
                                        DpRegFileReadEnB <= '1';
                                        nextExState <= readRegisterB;
                                        nextExState <= readRegisterB;
                                        -- The part that interface with the memory is located on the first process
                                        -- The part that interface with the memory is located on the first process
                                        nextExState <= readRegisterB;
                                        nextExState <= readRegisterB;
 
 
                                        -- ADD r2,r0 (See the testDatapath to see how to drive the datapath for this function)
                                        -- ADD r2,r0 (See the testDatapath to see how to drive the datapath for this function)
                                        when add_reg | sub_reg | and_reg | or_reg | xor_reg =>
                                        when add_reg | sub_reg | and_reg | or_reg | xor_reg =>
                                                MuxDp <= muxPos(fromAlu);
                                                MuxDp <= fromAlu;
                                                MuxRegDp <= muxRegPos(fromRegFileA);
                                                MuxRegDp <= muxRegPos(fromRegFileA);
                                                DpRegFileReadAddrA <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));    -- Read first operand
                                                DpRegFileReadAddrA <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));    -- Read first operand
                                                DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg2))); -- Read second operand
                                                DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg2))); -- Read second operand
                                                DpRegFileReadEnA <= '1';
                                                DpRegFileReadEnA <= '1';
                                                DpRegFileReadEnB <= '1';
                                                DpRegFileReadEnB <= '1';
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                                                DpAluOp <= opcode2AluOp(opcodeIR);      -- Select the alu operation from the operand
                                                DpAluOp <= opcode2AluOp(opcodeIR);      -- Select the alu operation from the operand
                                                nextExState <= writeRegister;
                                                nextExState <= writeRegister;
 
 
                                        -- MOV r0,10d (See the testDatapath to see how to drive the datapath for this function)
                                        -- MOV r0,10d (See the testDatapath to see how to drive the datapath for this function)
                                        when mov_val =>
                                        when mov_val =>
                                                MuxDp <= muxPos(fromImediate);
                                                MuxDp <= fromImediate;
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                ImmDp <= "0000000000" & operand_imm;    -- & is used to concatenate signals
                                                ImmDp <= "0000000000" & operand_imm;    -- & is used to concatenate signals
                                                nextExState <= writeRegister;
                                                nextExState <= writeRegister;
 
 
                                        -- ADD r3,2 (r2 <= r2+2) (See the testDatapath to see how to drive the datapath for this function)
                                        -- ADD r3,2 (r2 <= r2+2) (See the testDatapath to see how to drive the datapath for this function)
                                        when add_val | sub_val | and_val | or_val | xor_val =>
                                        when add_val | sub_val | and_val | or_val | xor_val =>
                                                MuxDp <= muxPos(fromAlu);
                                                MuxDp <= fromAlu;
                                                MuxRegDp <= muxRegPos(fromImediate);
                                                MuxRegDp <= muxRegPos(fromImediate);
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
                                                DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));    -- Read first operand
                                                DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));    -- Read first operand
                                                DpRegFileReadEnB <= '1';
                                                DpRegFileReadEnB <= '1';
                                                ImmDp <= "0000000000" & operand_imm;    -- & is used to concatenate signals                                             
                                                ImmDp <= "0000000000" & operand_imm;    -- & is used to concatenate signals                                             

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