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[/] [opencpu32/] [trunk/] [hdl/] [opencpu32/] [testRegisterFile.vhd] - Diff between revs 14 and 15

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Rev 14 Rev 15
Line 65... Line 65...
          B_Out => B_Out
          B_Out => B_Out
        );
        );
 
 
   --! Process that will stimulate all register assignments, and reads...
   --! Process that will stimulate all register assignments, and reads...
   stim_proc: process
   stim_proc: process
 
        variable allZ : std_logic_vector((nBits - 1) downto 0) := (others => 'Z');
   begin
   begin
                -- r0=1 ... r15=16---------------------------------------------------------------------------
                -- r0=1 ... r15=16---------------------------------------------------------------------------
                clk <= '0';
                clk <= '0';
                REPORT "Write r0 := 1" SEVERITY NOTE;
                REPORT "Write r0 := 1" SEVERITY NOTE;
                writeEn <= '1';
                writeEn <= '1';
Line 121... Line 122...
                REPORT "Check r0 = 1" SEVERITY NOTE;
                REPORT "Check r0 = 1" SEVERITY NOTE;
                Read_A_En <= '1';
                Read_A_En <= '1';
                Read_A_Addr <= r0;
                Read_A_Addr <= r0;
                wait for 1 ns;  -- Wait to stabilize the response
                wait for 1 ns;  -- Wait to stabilize the response
                assert A_Out = conv_std_logic_vector(1, nBits) report "Invalid value r0" severity FAILURE;
                assert A_Out = conv_std_logic_vector(1, nBits) report "Invalid value r0" severity FAILURE;
 
                assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
 
 
                REPORT "Check r1 = 2" SEVERITY NOTE;
                REPORT "Check r1 = 2" SEVERITY NOTE;
                Read_A_En <= '1';
                Read_A_En <= '1';
                Read_A_Addr <= r1;
                Read_A_Addr <= r1;
                wait for 1 ns;  -- Wait to stabilize the response
                wait for 1 ns;  -- Wait to stabilize the response
                assert A_Out = conv_std_logic_vector(2, nBits) report "Invalid value r1" severity FAILURE;
                assert A_Out = conv_std_logic_vector(2, nBits) report "Invalid value r1" severity FAILURE;
 
                assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
 
 
                REPORT "Check r2 = 3" SEVERITY NOTE;
                REPORT "Check r2 = 3" SEVERITY NOTE;
                Read_A_En <= '1';
                Read_A_En <= '1';
                Read_A_Addr <= r2;
                Read_A_Addr <= r2;
                wait for 1 ns;  -- Wait to stabilize the response
                wait for 1 ns;  -- Wait to stabilize the response
                assert A_Out = conv_std_logic_vector(3, nBits) report "Invalid value r2" severity FAILURE;
                assert A_Out = conv_std_logic_vector(3, nBits) report "Invalid value r2" severity FAILURE;
 
                assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
 
 
                REPORT "Check r3 = 4" SEVERITY NOTE;
                REPORT "Check r3 = 4" SEVERITY NOTE;
                Read_A_En <= '1';
                Read_A_En <= '1';
                Read_A_Addr <= r3;
                Read_A_Addr <= r3;
                wait for 1 ns;  -- Wait to stabilize the response
                wait for 1 ns;  -- Wait to stabilize the response
                assert A_Out = conv_std_logic_vector(4, nBits) report "Invalid value r3" severity FAILURE;
                assert A_Out = conv_std_logic_vector(4, nBits) report "Invalid value r3" severity FAILURE;
 
                assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
 
 
                REPORT "Check r4 = 5" SEVERITY NOTE;
                REPORT "Check r4 = 5" SEVERITY NOTE;
                Read_A_En <= '1';
                Read_A_En <= '1';
                Read_A_Addr <= r4;
                Read_A_Addr <= r4;
                wait for 1 ns;  -- Wait to stabilize the response
                wait for 1 ns;  -- Wait to stabilize the response
                assert A_Out = conv_std_logic_vector(5, nBits) report "Invalid value r4" severity FAILURE;
                assert A_Out = conv_std_logic_vector(5, nBits) report "Invalid value r4" severity FAILURE;
 
                assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
 
 
      wait;
      wait;
   end process;
   end process;
 
 
END;
END;

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