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[/] [openhmc/] [trunk/] [openHMC/] [sim/] [tb/] [bfm/] [src/] [hmc_tb.sv] - Diff between revs 12 and 15

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Rev 12 Rev 15
Line 62... Line 62...
        axi4_stream_config axi4_req_config;
        axi4_stream_config axi4_req_config;
 
 
        hmc_link_config link_cfg;
        hmc_link_config link_cfg;
 
 
        cag_rgm_rfs_env #(
        cag_rgm_rfs_env #(
                .ADDR_WIDTH(`RFS_HMC_CONTROLLER_RF_AWIDTH),
                .ADDR_WIDTH(`RFS_OPENHMC_RF_AWIDTH),
                .READ_DATA_WIDTH(`RFS_HMC_CONTROLLER_RF_RWIDTH),
                .READ_DATA_WIDTH(`RFS_OPENHMC_RF_RWIDTH),
                .WRITE_DATA_WIDTH(`RFS_HMC_CONTROLLER_RF_WWIDTH)
                .WRITE_DATA_WIDTH(`RFS_OPENHMC_RF_WWIDTH)
        ) rfs_hmc_I;
        ) rfs_hmc_I;
 
 
        rf_hmc_controller_rf_c rf_model_hmc;
        rf_openhmc_rf_c rf_model_hmc;
 
 
        hmc_vseqr v_seqr;
        vseqr v_seqr;
 
 
        int i = 2;
        int i = 2;
 
 
        `uvm_component_param_utils(hmc_tb #(.AXI4_DATA_BYTES(AXI4_DATA_BYTES), .AXI4_TUSER_WIDTH(AXI4_TUSER_WIDTH) ))
        `uvm_component_param_utils(hmc_tb #(.AXI4_DATA_BYTES(AXI4_DATA_BYTES), .AXI4_TUSER_WIDTH(AXI4_TUSER_WIDTH) ))
 
 
Line 141... Line 141...
                axi4_req = axi4_stream_env #(.DATA_BYTES(AXI4_DATA_BYTES),.TUSER_WIDTH(AXI4_TUSER_WIDTH))::type_id::create("axi4_req",this);
                axi4_req = axi4_stream_env #(.DATA_BYTES(AXI4_DATA_BYTES),.TUSER_WIDTH(AXI4_TUSER_WIDTH))::type_id::create("axi4_req",this);
                axi4_rsp = axi4_stream_env #(.DATA_BYTES(AXI4_DATA_BYTES),.TUSER_WIDTH(AXI4_TUSER_WIDTH))::type_id::create("axi4_rsp",this);
                axi4_rsp = axi4_stream_env #(.DATA_BYTES(AXI4_DATA_BYTES),.TUSER_WIDTH(AXI4_TUSER_WIDTH))::type_id::create("axi4_rsp",this);
 
 
                hmc_module = hmc_module_env::type_id::create("hmc_module",this);
                hmc_module = hmc_module_env::type_id::create("hmc_module",this);
 
 
                rfs_hmc_I = cag_rgm_rfs_env #(.ADDR_WIDTH(`RFS_HMC_CONTROLLER_RF_AWIDTH), .READ_DATA_WIDTH(`RFS_HMC_CONTROLLER_RF_RWIDTH),.WRITE_DATA_WIDTH(`RFS_HMC_CONTROLLER_RF_WWIDTH))::type_id::create("rfs_hmc_I", this);
                rfs_hmc_I = cag_rgm_rfs_env #(.ADDR_WIDTH(`RFS_OPENHMC_RF_AWIDTH), .READ_DATA_WIDTH(`RFS_OPENHMC_RF_RWIDTH),.WRITE_DATA_WIDTH(`RFS_OPENHMC_RF_WWIDTH))::type_id::create("rfs_hmc_I", this);
                rf_model_hmc = rf_hmc_controller_rf_c::type_id::create("rf_model_hmc",this);
                rf_model_hmc = rf_openhmc_rf_c::type_id::create("rf_model_hmc",this);
 
 
                v_seqr = hmc_vseqr::type_id::create("v_seqr", this);
                v_seqr = vseqr::type_id::create("v_seqr", this);
 
 
        endfunction : build_phase
        endfunction : build_phase
 
 
        function void connect_phase(uvm_phase phase);
        function void connect_phase(uvm_phase phase);
 
 
Line 198... Line 198...
                //-- virtual sequencer
                //-- virtual sequencer
                v_seqr.axi4_req_seqr = axi4_req_seqr;
                v_seqr.axi4_req_seqr = axi4_req_seqr;
                v_seqr.rf_seqr_hmc   = rfs_hmc_I.sequencer;
                v_seqr.rf_seqr_hmc   = rfs_hmc_I.sequencer;
 
 
 
 
 
                v_seqr.scb = hmc_module.scb;
 
 
        endfunction : connect_phase
        endfunction : connect_phase
 
 
endclass : hmc_tb
endclass : hmc_tb
 
 
`endif // hmc_TB_SV
`endif // hmc_TB_SV

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