URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src-c/] [sandbox/] [sandbox.v] - Diff between revs 76 and 145

Rev 76	Rev 145
Line 39...	Line 39...
`$display("\| START SIMULATION \|");`	`$display("\| START SIMULATION \|");`
`$display(" ===============================================");`	`$display(" ===============================================");`
`repeat(5) @(posedge mclk);`	`repeat(5) @(posedge mclk);`
`stimulus_done = 0;`	`stimulus_done = 0;`

	`//---------------------------------------`
	`// Check CPU configuration`
	`//---------------------------------------`
	if ((`PMEM_SIZE !== 24576) \|\| (`DMEM_SIZE !== 16384))
	`begin`
	`$display(" ===============================================");`
	`$display("\| SIMULATION ERROR \|");`
	`$display("\| \|");`
	`$display("\| Core must be configured for: \|");`
	`$display("\| - 24kB program memory \|");`
	`$display("\| - 16kB data memory \|");`
	`$display(" ===============================================");`
	`$finish;`
	`end`


	`//---------------------------------------`
	`// Generate stimulus`
	`//---------------------------------------`

`repeat(1000) @(posedge mclk);`	`repeat(1000) @(posedge mclk);`
`p1_din = 8'h01;`	`p1_din = 8'h01;`
`repeat(10) @(posedge mclk);`	`repeat(10) @(posedge mclk);`
`p1_din = 8'h00;`	`p1_din = 8'h00;`
`repeat(1000) @(posedge mclk);`	`repeat(1000) @(posedge mclk);`