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This will install the three variations of the @value{OR1KSIM} tool,
This will install the three variations of the @value{OR1KSIM} tool,
@command{or32-uclinux-sim}, @command{or32-uclinux-psim} and
@command{or32-uclinux-sim}, @command{or32-uclinux-psim} and
@command{or32-uclinux-mpsim}, the @value{OR1KSIM} library, @file{libsim}, the
@command{or32-uclinux-mpsim}, the @value{OR1KSIM} library, @file{libsim}, the
header file, @file{or1ksim.h} and this documentation in @command{info} format.
header file, @file{or1ksim.h} and this documentation in @command{info} format.
 
 
@quotation Note
 
Testing @value{OR1KSIM} with @kbd{make check} is not yet supported.
 
@end quotation
 
 
 
The documentation may be created and installed in alternative formats (PDF,
The documentation may be created and installed in alternative formats (PDF,
Postscript, DVI, HTML) with for example:
Postscript, DVI, HTML) with for example:
 
 
@example
@example
@kbd{make pdf}
@kbd{make pdf}
Line 322... Line 318...
@end example
@end example
 
 
@node Known Issues
@node Known Issues
@section Known Problems and Issues
@section Known Problems and Issues
 
 
The following problems and issues are known about with @value{OR1KSIM}
Full details of outstanding issues may be found in the @file{NEWS} file in
@value{VERSION}.  The OpenRISC tracker may be used to see the current
the main directory of the distribution.  The OpenRISC tracker may be used
state of these issues and to raise new problems and feature requests.  It
to see the current state of these issues and to raise new problems and
may be found at @url{http://www.opencores.org/ptracker.cgi/view/or1k/398}.
feature requests.  It may be found at
 
@url{http://opencores.org/project,or1k,bugtracker}.
 
 
 
The following issues are long standing and unlikely to be fixed in
 
Or1ksim in the near future.
 
 
@itemize @bullet
@itemize @bullet
@item
@item
The Supervision Register Little Endian Enable (LEE) bit is
The Supervision Register Little Endian Enable (LEE) bit is
ignored.  @value{OR1KSIM} can be built for either little endian or big endian
ignored.  @value{OR1KSIM} can be built for either little endian or big endian
use, but that behavior cannot be changed dynamically.
use, but that behavior cannot be changed dynamically.
 
 
@item
@item
The NPC is a read/write register, but after being written it clears the
 
pipeline.  This means that if the processor is stalled, the value should
 
subsequently read back as 0, until the processor is unstalled and able
 
to refill its pipeline.  By default @value{OR1KSIM} always reports back the value
 
of NPC, even when it has been written while stalled.
 
 
 
There is now an option, @code{--strict-npc}, which will enforce this
 
behavior.  At some stage in the future it will become the default
 
behavior, but for now it is an option, since its use will break GDB.
 
 
 
@item
 
The memory components are given names in the configuration file.  However
 
there is currently no way for @value{OR1KSIM} to report that name back to the
 
user (for example to identify which memory block corresponds to a
 
particular access).
 
 
 
@item
 
@value{OR1KSIM} allows the processor to be stalled (from the command
 
line), even if there is no debugger present.  This seems to be a
 
meaningless operation.
 
 
 
@item
 
@value{OR1KSIM} is not reentrant, so a program cannot instantiate
@value{OR1KSIM} is not reentrant, so a program cannot instantiate
multiple instances using the library.  This is clearly a problem when
multiple instances using the library.  This is clearly a problem when
considering multi-core applications.  However it stems from the original
considering multi-core applications.  However it stems from the original
design, and can only be fixed by a complete rewrite.  The entire source
design, and can only be fixed by a complete rewrite.  The entire source
code uses static global constants liberally!
code uses static global constants liberally!
 
 
@item
 
@cindex floating point support
 
There is no support for single precision floating point instructions in
 
@value{OR1KSIM} if configured in the CPU (@pxref{CPU Configuration, ,
 
CPU Configuration}).  These are implemented using the floating point
 
support in the host C library, which will usually be IEEE 745 compliant.
 
There is at present no support for double precision floating point
 
instructions, since these are meaningless with 32-bit registers.
 
 
 
Floating point support within OpenRISC is intended to follow IEEE 745,
 
which offers a degree of configurability. However at present the FPSCR
 
register is not supported, so there is no mechanism for configuring
 
floating point behavior. Thus the default functionality of the host C
 
library will be used.
 
 
 
@item
 
@cindex floating point multiply and add
 
@cindex lf.madd.s
 
The single precision floating point multiply and add instruction,
 
@code{lf.madd.s}, is not clearly specified in the original architectural
 
manual. User should consult the @cite{OpenRISC 1200 version 2
 
Supplementary Programmer's Reference Manual} for a specification of the
 
functionality implemented.
 
 
 
@end itemize
@end itemize
 
 
@node Usage
@node Usage
@chapter Usage
@chapter Usage
@cindex running @value{OR1KSIM}
@cindex running @value{OR1KSIM}
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@cindex command line for @value{OR1KSIM} standalone use
@cindex command line for @value{OR1KSIM} standalone use
 
 
The general form the standalone command is:
The general form the standalone command is:
 
 
@example
@example
or32-uclinux-sim [-vhi] [-f @var{file}] [--nosrv] [--srv=[@var{n}]] [-d @var{str}]
or32-uclinux-sim [-vhiqV] [-f @var{file}] [--nosrv] [--srv=[@var{n}]]
 
                 [-m <n>][-d @var{str}]
                 [--enable-profile] [--enable-mprofile] [@var{file}]
                 [--enable-profile] [--enable-mprofile] [@var{file}]
@end example
@end example
 
 
Many of the options have both a short and a long form.  For example
Many of the options have both a short and a long form.  For example
@code{-h} or @code{--help}.
@code{-h} or @code{--help}.
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@itemx --help
@itemx --help
@cindex @code{-h}
@cindex @code{-h}
@cindex @code{--help}
@cindex @code{--help}
Print out help about the command line options and what they mean.
Print out help about the command line options and what they mean.
 
 
 
@item -i
 
@itemx --interactive
 
@cindex @code{-i}
 
@cindex @code{--interactive}
 
After starting, drop into the @value{OR1KSIM} interactive command
 
shell.
 
 
 
@item -q
 
@itemx --quiet
 
@cindex @code{-q}
 
@cindex @code{--quiet}
 
Do not generate any information messages, only error messages.
 
 
 
@item -V
 
@itemx --verbose
 
@cindex @code{-V}
 
@cindex @code{--verbose}
 
Generate extra output messages (equivalent of specifying the ``verbose''
 
option in the simulator configuration section (see @pxref{Simulator Behavior, , Simulator Behavior}).
 
 
@item -f @var{file}
@item -f @var{file}
@itemx --file @var{file}
@itemx --file @var{file}
@cindex @code{-f}
@cindex @code{-f}
@cindex @code{--file}
@cindex @code{--file}
Read configuration commands from the specified file, looking first in
Read configuration commands from the specified file, looking first in
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server, otherwise a random value from the private port range
server, otherwise a random value from the private port range
(41920-65535) will be used.  This option may not be specified with
(41920-65535) will be used.  This option may not be specified with
@code{--nosrv}.  If it is, a rude message is printed and the
@code{--nosrv}.  If it is, a rude message is printed and the
@code{--nosrv} option is ignored.
@code{--nosrv} option is ignored.
 
 
 
@item -m=@var{size}
 
@itemx --memory=@var{size}
 
@cindex @code{-m}
 
@cindex @code{--memory}
 
Configure a memory block of @var{size} bytes, starting at address
 
zero.  The size may be followed by @samp{k}, @samp{K}, @samp{m},
 
@samp{M}, @samp{g}, @samp{G}, to indicate kilobytes (@math{2^{10}}
 
bytes), megabytes (@math{2^{20}} bytes) and gigabytes (@math{2^{30}}
 
bytes).
 
 
 
This is mainly intended for use when Or1ksim is used without a
 
configuration file, to allow just the processor and memory to be set
 
up.  This is the equivalent of specifying a configuration memory section
 
with @code{baseaddr = 0} and @code{size = @var{size}} and all other
 
parameters taking their default value.
 
 
 
If a configuration file is also used, it should be sure not to specify
 
an overlapping memory block.
 
 
@item -d=@var{config_string}
@item -d=@var{config_string}
@itemx --debug-config=@var{config_string}
@itemx --debug-config=@var{config_string}
@cindex @code{-d}
@cindex @code{-d}
@cindex @code{--debug-config}
@cindex @code{--debug-config}
Enable selected debug messages in @value{OR1KSIM}.  This parameter is
Enable selected debug messages in @value{OR1KSIM}.  This parameter is
for use by developers only, and is not covered further here.  See the
for use by developers only, and is not covered further here.  See the
source code for more details.
source code for more details.
 
 
@item -i
@item --report-memory-errors
@itemx --interactive
@cindex @code{--report-memory-errors}
@cindex @code{-i}
By default all exceptions are now handled silently.  If this option is
@cindex @code{--interactive}
specified, bus exceptions will be reported with a message to standard
After starting, drop into the @value{OR1KSIM} interactive command
error indicating the address at which the exception occurred.
shell.
 
 
This was the default behaviour up to Or1ksim 0.4.0.  This flag is
 
provided for those who wish to keep that behavior.
 
 
@item --strict-npc
@item --strict-npc
@cindex @code{--strict-npc}
@cindex @code{--strict-npc}
In real hardware, setting the next program counter (NPC, SPR 16),
In real hardware, setting the next program counter (NPC, SPR 16),
flushes the processor pipeline.  The consequence of this is that until
flushes the processor pipeline.  The consequence of this is that until
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used, then @value{OR1KSIM} will mirror real hardware more accurately.  If the NPC
used, then @value{OR1KSIM} will mirror real hardware more accurately.  If the NPC
is changed while the processor is stalled, subsequent reads of its value
is changed while the processor is stalled, subsequent reads of its value
will return 0 until the processor is unstalled.
will return 0 until the processor is unstalled.
 
 
This is not currently the default behavior, since tools such as GDB have
This is not currently the default behavior, since tools such as GDB have
been implemented assuming the historic @value{OR1KSIM} behavior.  However at some
been implemented assuming the historic @value{OR1KSIM} behavior.
time in the future it will become the default.
However at some time in the future it will become the default.
 
 
@item --enable-profile
@item --enable-profile
@cindex @code{--enable-profile}
@cindex @code{--enable-profile}
Enable instruction profiling.
Enable instruction profiling.
 
 
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library, the flag, @code{-lsim} should be added to the link command.
library, the flag, @code{-lsim} should be added to the link command.
 
 
The header file @file{or1ksim.h} contains appropriate declarations of
The header file @file{or1ksim.h} contains appropriate declarations of
the functions exported by the @value{OR1KSIM} library.  These are:
the functions exported by the @value{OR1KSIM} library.  These are:
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_init (const char
@deftypefn {@file{or1ksim.h}} int or1ksim_init (int @var{argc}, char *@var{argv}, void *@var{class_ptr},
*@var{config_file}, const char *@var{image_file}, void *@var{class_ptr},
 
int (*@var{upr})(void *@var{class_ptr}, unsigned long int @var{addr},
int (*@var{upr})(void *@var{class_ptr}, unsigned long int @var{addr},
unsigned char @var{mask}[], unsigned char @var{rdata}[], int
unsigned char @var{mask}[], unsigned char @var{rdata}[], int
@var{data_len}), int (*@var{upw})(void *@var{class_ptr}, unsigned long
@var{data_len}), int (*@var{upw})(void *@var{class_ptr}, unsigned long
int @var{addr}, unsigned char @var{mask}[], unsigned char @var{wdata}[],
int @var{addr}, unsigned char @var{mask}[], unsigned char @var{wdata}[],
int @var{data_len}))
int @var{data_len}))
 
 
The initialization function is supplied with the name of a
The initialization function is supplied with a vector of arguments,
configuration file, @var{config_file}, an executable image, @var{image_file}, a pointer to the calling
which are interpreted as arguments to the standalone version (see
class, @var{class_ptr} (since the library may be used from C++) and
@pxref{Standalone Simulator, , Standalone Simulator}), a pointer to the
two up-call functions, one for reads, @var{upr}, and one for writes,
calling class, @var{class_ptr} (since the library may be used from C++)
 
and two up-call functions, one for reads, @var{upr}, and one for writes,
@var{upw}.
@var{upw}.
 
 
@xref{Configuration, , Configuration}, for detailed information on
 
configuring @value{OR1KSIM} and the format of the configuration file.
 
 
 
@var{upw} is called for any write to an address external to the model
@var{upw} is called for any write to an address external to the model
(determined by a @code{generic} section in the configuration
(determined by a @code{generic} section in the configuration
file).  @var{upr} is called for any reads to an external address.  The
file).  @var{upr} is called for any reads to an external address.  The
@var{class_ptr} is passed back with these upcalls, allowing the
@var{class_ptr} is passed back with these upcalls, allowing the
function to associate the call with the class which originally
function to associate the call with the class which originally
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read.  Bytes to be read/written should have 0xff set in
read.  Bytes to be read/written should have 0xff set in
@var{mask}.  Otherwise the byte should be zero.  The adddress,
@var{mask}.  Otherwise the byte should be zero.  The adddress,
@var{addr}, is the @emph{full} address, since the upcall function must
@var{addr}, is the @emph{full} address, since the upcall function must
handle all generic devices, using the full address for decoding.
handle all generic devices, using the full address for decoding.
 
 
Endianness is not completely transparent, since @value{OR1KSIM} is
Endianness is not a concern, since @value{OR1KSIM} is transferring byte
transferring byte vectors, not multi-byte values.
vectors, not multi-byte values.
 
 
 
The result indicates whether the initialization was successful.  The
 
integer values are available as an @code{enum or1ksim}, with possible
 
values @code{OR1KSIM_RC_OK} and @code{OR1KSIM_RC_BADINIT}.
 
 
@quotation Caution
@quotation Caution
This is a change from version 0.3.0. It simplifies the interface, and
This is a change from versions 0.3.0 and 0.4.0.  It further simplifies
makes @value{OR1KSIM} more consistent with payload representation in
the interface, and makes @value{OR1KSIM} more consistent with payload
SystemC TLM 2.0.
representation in SystemC TLM 2.0.
@end quotation
@end quotation
 
 
@quotation Note
@quotation Note
The current implementation of Or1ksim always transfers single words (4
The current implementation of Or1ksim always transfers single words (4
bytes), using masks if smaller values are required.  In this it mimcs the
bytes), using masks if smaller values are required.  In this it mimcs the
Line 693... Line 690...
 
 
@end deftypefn
@end deftypefn
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_run (double  @var{duration})
@deftypefn {@file{or1ksim.h}} int or1ksim_run (double  @var{duration})
 
 
Run the simulator for the simulated duration specified (in seconds).
Run the simulator for the simulated duration specified (in seconds).  A
 
duration of -1 indicates `run forever'
 
 
 
The result indicates how the run terminated.  The integer values are
 
available as an @code{enum or1ksim}, with possible values
 
@code{OR1KSIM_RC_OK} (ran for the full duration),
 
@code{OR1KSIM_RC_BRKPT} (terminated early due to hitting a breakpoint)
 
and @code{OR1KSIM_RC_HALTED} (terminated early due to hitting
 
@code{l.nop 1}).
 
 
@end deftypefn
@end deftypefn
 
 
@deftypefn {@file{or1ksim.h}} void or1ksim_reset_duration (double @var{duration})
@deftypefn {@file{or1ksim.h}} void or1ksim_reset_duration (double @var{duration})
 
 
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@end deftypefn
@end deftypefn
 
 
@deftypefn {@file{or1ksim.h}} double or1ksim_jtag_shift_ir (unsigned
@deftypefn {@file{or1ksim.h}} double or1ksim_jtag_shift_ir (unsigned
char *@var{jreg}, int @var{num_bits})
char *@var{jreg}, int @var{num_bits})
 
 
Shift the supplied register through the JTAG instruction
Shift the supplied register through the JTAG instruction register.
register.  Return the (model) time taken for this action. The register is
Return the (model) time taken for this action.  The register is supplied
supplied as a byte vector, with the least significant bits in the least
as a byte vector, with the least significant bits in the least
significant byte.  If the total number of bits is not an exact number of
significant byte.  If the total number of bits is not an exact number of
bytes, then the odd bits are found in the least significant end of the
bytes, then the odd bits are found in the least significant end of the
highest numbered byte.
highest numbered byte.
 
 
For example a 12-bit register would have bits 0-7 in byte 0 and bits
For example a 12-bit register would have bits 0-7 in byte 0 and bits
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For example a 12-bit register would have bits 0-7 in byte 0 and bits
For example a 12-bit register would have bits 0-7 in byte 0 and bits
11-8 in the least significant 4 bits of byte 1.
11-8 in the least significant 4 bits of byte 1.
 
 
@end deftypefn
@end deftypefn
 
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_read_mem (unsigned
 
long int @var{addr}, unsigned char *@var{buf}, int @var{len})
 
 
 
Read @var{len} bytes from @var{addr}, placing the result in @var{buf}.
 
Return @var{len} on success and 0 on failure.
 
 
 
@quotation Note
 
This function was added in Or1ksim 0.5.0.
 
@end quotation
 
 
 
@end deftypefn
 
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_write_mem (unsigned
 
long int @var{addr}, unsigned char *@var{buf}, int @var{len})
 
 
 
Write @var{len} bytes to @var{addr}, taking the data from @var{buf}.
 
Return @var{len} on success and 0 on failure.
 
 
 
@quotation Note
 
This function was added in Or1ksim 0.5.0.
 
@end quotation
 
 
 
@end deftypefn
 
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_read_spr (int @var{sprnum}, unsigned
 
long int *@var{sprval_ptr})
 
 
 
Read the SPR specified by @var{sprnum}, placing the result in
 
@var{sprval_ptr}.  Return non-zero on success and 0 on failure.
 
 
 
@quotation Note
 
This function was added in Or1ksim 0.5.0.
 
@end quotation
 
 
 
@end deftypefn
 
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_write_spr (int @var{sprnum}, unsigned
 
long int @var{sprva})
 
 
 
Write @var{sprval} to the SPR specified by @var{sprnum}.  Return
 
non-zero on success and 0 on failure.
 
 
 
@quotation Note
 
This function was added in Or1ksim 0.5.0.
 
@end quotation
 
 
 
@end deftypefn
 
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_read_reg (int @var{regnum}, unsigned
 
long int *@var{regval_ptr})
 
 
 
Read the general purpose register specified by @var{regnum}, placing the
 
result in @var{regval_ptr}.  Return non-zero on success and 0 on
 
failure.
 
 
 
@quotation Note
 
This function was added in Or1ksim 0.5.0.
 
@end quotation
 
 
 
@end deftypefn
 
 
 
@deftypefn {@file{or1ksim.h}} int or1ksim_write_reg (int @var{regnum}, unsigned
 
long int @var{regva})
 
 
 
Write @var{regval} to the general purpose register specified by
 
@var{regnum}.  Return non-zero on success and 0 on failure.
 
 
 
@quotation Note
 
This function was added in Or1ksim 0.5.0.
 
@end quotation
 
 
 
@end deftypefn
 
 
 
@deftypefn {@file{or1ksim.h}} void or1ksim_set_stall_state (int
 
@var{state})
 
 
 
Set the processor's state according to @var{state} (1 = stalled, 0 = not
 
stalled).
 
 
 
@quotation Note
 
This function was added in Or1ksim 0.5.0.
 
@end quotation
 
 
 
@end deftypefn
 
 
The libraries will be installed in the @file{lib} sub-directory of the
The libraries will be installed in the @file{lib} sub-directory of the
main installation directory (as specified with the @option{--prefix}
main installation directory (as specified with the @option{--prefix}
option to the @command{configure} script).
option to the @command{configure} script).
 
 
For example if the main installation directory is @file{/opt/or1ksim},
For example if the main installation directory is @file{/opt/or1ksim},
Line 871... Line 961...
 
 
@node Configuration File Format
@node Configuration File Format
@section Configuration File Format
@section Configuration File Format
@cindex configuration file structure
@cindex configuration file structure
 
 
The configuration file is a plain text file.
The configuration file is a plain text file.  A reference example,
 
@file{sim.cfg}, is included in the top level directory of the
 
distribution.
 
 
@menu
@menu
* Configuration File Preprocessing::
* Configuration File Preprocessing::
* Configuration File Syntax::
* Configuration File Syntax::
@end menu
@end menu
Line 1014... Line 1106...
@item prof_file = ``@var{filename}''
@item prof_file = ``@var{filename}''
@cindex @code{prof_file} (simulator configuration)
@cindex @code{prof_file} (simulator configuration)
@cindex @code{prof_fn} (simulator configuration - deprecated)
@cindex @code{prof_fn} (simulator configuration - deprecated)
Specifies the file to be used with the @code{profile} parameter.  Default
Specifies the file to be used with the @code{profile} parameter.  Default
@file{sim.profile}.  For backwards compatibility, the alternative name
@file{sim.profile}.  For backwards compatibility, the alternative name
@code{prof_fn} is supported for this parameter, but deprecated.
@code{prof_fn} is supported for this parameter, but deprecated.  Default
 
@file{sim.profile}.
 
 
 
 
@item mprofile = 0|1
@item mprofile = 0|1
@cindex @code{mprofile} (simulator configuration)
@cindex @code{mprofile} (simulator configuration)
If 1 (true) generate a memory profiling file using the file specified in the
If 1 (true) generate a memory profiling file using the file specified in the
@code{mprof_file} parameter or otherwise @file{sim.mprofile}.  Default 0.
@code{mprof_file} parameter or otherwise @file{sim.mprofile}.  Default 0.
 
 
@item mprof_fn = ``@var{filename}''
@item mprof_file = ``@var{filename}''
@cindex @code{mprof_file} (simulator configuration)
@cindex @code{mprof_file} (simulator configuration)
@cindex @code{mprof_fn} (simulator configuration - deprecated)
@cindex @code{mprof_fn} (simulator configuration - deprecated)
Specifies the file to be used with the @code{mprofile} parameter.  Default
Specifies the file to be used with the @code{mprofile} parameter.  Default
@file{sim.mprofile}.  For backwards compatibility, the alternative name
@file{sim.mprofile}.  For backwards compatibility, the alternative name
@code{mprof_fn} is supported for this parameter, but deprecated.
@code{mprof_fn} is supported for this parameter, but deprecated.
 
Default @file{sim.mprofile}.
 
 
@item history = 0|1
@item history = 0|1
@cindex @code{history} (simulator configuration)
@cindex @code{history} (simulator configuration)
If 1 (true) track execution flow.  Default 0.
If 1 (true) track execution flow.  Default 0.
 
 
Line 1112... Line 1207...
@file{executed.log}.  For backwards compatibility, the alternative name
@file{executed.log}.  For backwards compatibility, the alternative name
@code{exe_log_fn} is supported for this parameter, but deprecated.
@code{exe_log_fn} is supported for this parameter, but deprecated.
 
 
@item exe_bin_insn_log = 0|1
@item exe_bin_insn_log = 0|1
@cindex @code{exe_bin_insn_log} (simulator configuration)
@cindex @code{exe_bin_insn_log} (simulator configuration)
Enable logging of executed instructions to a file in binary format. This is
Enable logging of executed instructions to a file in binary format.
helpful for off-line dynamic execution analysis.
This is helpful for off-line dynamic execution analysis.
 
 
@quotation Note
@quotation Note
Execution logs can be @emph{very} big. For example, while booting the Linux
Execution logs can be @emph{very} big.  For example, while booting the
kernel, version 2.6.34, a log file 1.2GB in size was generated.
Linux kernel, version 2.6.34, a log file 1.2GB in size was generated.
@end quotation
@end quotation
 
 
@item exe_bin_insn_log_file = @var{filename}
@item exe_bin_insn_log_file = @var{filename}
@cindex @code{exe_bin_insn_log_file} (simulator configuration)
@cindex @code{exe_bin_insn_log_file} (simulator configuration)
Filename for the binary execution log filename if @code{exe_bin_insn_log} is
Filename for the binary execution log filename if @code{exe_bin_insn_log} is
Line 1225... Line 1320...
@item memory_order=none
@item memory_order=none
@cindex @code{memory_order=none} (CUC configuration)
@cindex @code{memory_order=none} (CUC configuration)
Different memory ordering, even if there are dependencies.  Bursts can
Different memory ordering, even if there are dependencies.  Bursts can
be made, width can change.
be made, width can change.
 
 
 
@item memory_order=weak
@cindex @code{memory_order=weak} (CUC configuration)
@cindex @code{memory_order=weak} (CUC configuration)
Different memory ordering, even if there are dependencies.  If
Different memory ordering, even if there are dependencies.  If
dependencies cannot occur, then bursts can be made, width can change.
dependencies cannot occur, then bursts can be made, width can change.
 
 
 
@item memory_order=strong
@cindex @code{memory_order=strong} (CUC configuration)
@cindex @code{memory_order=strong} (CUC configuration)
Same memory ordering.  Bursts can be made, width can change.
Same memory ordering.  Bursts can be made, width can change.
 
 
 
@item memory_order=exact
@cindex @code{memory_order=exact} (CUC configuration)
@cindex @code{memory_order=exact} (CUC configuration)
Exactly the same memory ordering and widths.
Exactly the same memory ordering and widths.
 
 
@end table
@end table
 
 
Line 1427... Line 1525...
@quotation Caution
@quotation Caution
The user may choose whether or not to enable a memory controller. If a
The user may choose whether or not to enable a memory controller. If a
memory controller is enabled, then the standard OpenRISC C libraries
memory controller is enabled, then the standard OpenRISC C libraries
will initialize it to expect 64MB memory blocks, and any memory
will initialize it to expect 64MB memory blocks, and any memory
declarations @emph{must} reflect this.  The section describing memory
declarations @emph{must} reflect this.  The section describing memory
controller configuration describes the steps necessary for using
controller configuration describes the steps necessary for using smaller
smaller or larger memory sections (@pxref{Memory Controller
or larger memory sections (@pxref{Memory Controller Configuration, ,
Configuration, , Memory Controller Configuration}).
Memory Controller Configuration}).
 
 
If a memory controller is @emph{not} enabled, then the standard C
If a memory controller is @emph{not} enabled, then the standard C
library code will generate memory access errors.  The solution is to
library code will generate memory access errors.  The solution is to
declare an additional writable memory block, mimicing the memory
declare an additional writable memory block, mimicing the memory
controller's register bank as follows.
controller's register bank as follows.
Line 1477... Line 1575...
@code{pattern} field in this section (see below).
@code{pattern} field in this section (see below).
 
 
@item unknown
@item unknown
@cindex @code{type=unknown} (memory configuration)
@cindex @code{type=unknown} (memory configuration)
The memory values are not initialized (i.e.  left ``unknown'').  This
The memory values are not initialized (i.e.  left ``unknown'').  This
option will yield faster initialization of the simulator.
option will yield faster initialization of the simulator.  This is the
 
default.
 
 
@item zero
@item zero
@cindex @code{type=zero} (memory configuration)
@cindex @code{type=zero} (memory configuration)
Set the memory values to be 0.  This is the equivalent of
Set the memory values to be 0.  This is the equivalent of
@code{type=pattern} and a @code{pattern} value of 0, and implemented
@code{type=pattern} and a @code{pattern} value of 0, and implemented
Line 1562... Line 1661...
Set the chip enable index of the memory instance.  Each memory instance
Set the chip enable index of the memory instance.  Each memory instance
should have a unique chip enable index, which should be greater
should have a unique chip enable index, which should be greater
than or equal to zero.  This is used by the memory controller when
than or equal to zero.  This is used by the memory controller when
identifying different memory instances.
identifying different memory instances.
 
 
There is no requirement to set  @code{ce} if a memory controller is
There is no requirement to set @code{ce} if a memory controller is not
not enabled. The default value is -1 (invalid).
enabled.  The default value is -1 (invalid).
 
 
@item mc = @var{value}
@item mc = @var{value}
@cindex @code{mc} (memory configuration)
@cindex @code{mc} (memory configuration)
Specifies the memory controller this memory is connected to.  It should
Specifies the memory controller this memory is connected to.  It should
correspond to the @code{index} field specified in a @code{@w{section
correspond to the @code{index} field specified in a @code{@w{section
mc}} for a memory controller (@pxref{Memory Controller Configuration,
mc}} for a memory controller (@pxref{Memory Controller Configuration,
, Memory Controller Configuration}).
, Memory Controller Configuration}).
 
 
There is no requirement to set  @code{mc} if a memory controller is
There is no requirement to set @code{mc} if a memory controller is not
not enabled. Default value is 0, which is also the default value of a memory
enabled.  Default value is 0, which is also the default value of a
controller @code{index} field.  This is suitable therefore for designs
memory controller @code{index} field.  This is suitable therefore for
with just one memory controller.
designs with just one memory controller.
 
 
@item delayr = @var{value}
@item delayr = @var{value}
@cindex @code{delayr} (memory configuration)
@cindex @code{delayr} (memory configuration)
The number of cycles required for a read access.  Set to -1 if the
The number of cycles required for a read access.  Set to -1 if the
memory does not support reading.  Default value 1.  The simulator will
memory does not support reading.  Default value 1.  The simulator will
Line 2705... Line 2804...
 
 
@item file = "@var{filename}"
@item file = "@var{filename}"
@cindex @code{file} (ATA/ATAPI device configuration)
@cindex @code{file} (ATA/ATAPI device configuration)
@file{filename} specifies the file to be used for a simulated ATA
@file{filename} specifies the file to be used for a simulated ATA
device if the file type (see @code{type} above) is 1.  Default value
device if the file type (see @code{type} above) is 1.  Default value
@code{"ata-File@var{n}"}, where @var{n} is the device number.
@code{"ata_file@var{n}"}, where @var{n} is the device number.
 
 
@item size = @var{value}
@item size = @var{value}
@cindex @code{size} (ATA/ATAPI device configuration)
@cindex @code{size} (ATA/ATAPI device configuration)
@var{value} specifies the size of a simulated ATA device if the file
@var{value} specifies the size of a simulated ATA device if the file
type (see @code{type} above) is 1.  The default value is zero.
type (see @code{type} above) is 1.  The default value is zero.
Line 3602... Line 3701...
 
 
@item test-code
@item test-code
@cindex target test code
@cindex target test code
@cindex test code for target
@cindex test code for target
These are all the test programs to be compiled with the OpenRISC tool
These are all the test programs to be compiled with the OpenRISC tool
chain to run with either standalone @value{OR1KSIM} or the library. This
chain to run with either standalone @value{OR1KSIM} or the library.
directory includes its own @file{configure.ac}, since it must set up a
This directory includes its own @file{configure.ac}, since it must set
separate tool chain based on the target, not the host.
up a separate tool chain based on the target, not the host.
 
 
@end table
@end table
 
 
To add a new test needs the following steps.
To add a new test needs the following steps.
 
 
@itemize @bullet
@itemize @bullet
 
 
@item
@item
Put new host C code in its own directory within @file{test-code}. Add
Put new host C code in its own directory within @file{test-code}. Add
the directory to the existing @file{Makefile.am} in the @file{test-code}
the directory to the existing @file{Makefile.am} in the @file{test-code}
directory and create a @file{Makefile.am} in the new directory to
directory and create a @file{Makefile.am} in the new directory to drive
drive building the test program(s). Don't forget to add the new
building the test program(s).  Don't forget to add the new
@file{Makefile} to the top level @file{configure.ac} so it gets generated. Not
@file{Makefile} to the top level @file{configure.ac} so it gets
all tests require code here.
generated. Not all tests require code here.
 
 
@item
@item
Put new target C code in its own directory within
Put new target C code in its own directory within @file{test-code-or1k}.
@file{test-code-or1k}. Once again modify & create
Once again modify & create @file{Makefile.am}.  This time modify the
@file{Makefile.am}. this time though modify the @file{configure.ac} in
@file{configure.ac} in the @file{test-code-or1k} so the @file{Makefile}
the @file{test-code-or1k} so the @file{Makefile} gets generated. The
gets generated.  The existing programs provide examples to start from,
existing programs provide examples to start from, including custom
including custom linker scripts where needed.
linker scripts where needed.
 
 
 
@item
@item
Add one or more tests and configuration files to the relevant ``tool''
Add one or more tests and configuration files to the relevant ``tool''
test directory. Use the existing tests as templates. They make heavy use
test directory.  Use the existing tests as templates.  They make heavy
of the @command{expect}/TCL procedures in the @file{config} directory to
use of the @command{expect}/TCL procedures in the @file{config}
facilitate driving the tests.
directory to facilitate driving the tests.
 
 
@end itemize
@end itemize
 
 
@node  GNU Free Documentation License
@node  GNU Free Documentation License
@chapter GNU Free Documentation License
@chapter GNU Free Documentation License

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