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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] [inst-set-test.S] - Diff between revs 121 and 787

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Rev 121 Rev 787
Line 70... Line 70...
 * Set up the stack and jump to _start
 * Set up the stack and jump to _start
 * ------------------------------------------------------------------------- */
 * ------------------------------------------------------------------------- */
        .org 0x100
        .org 0x100
        .global _reset
        .global _reset
_reset:
_reset:
 
    // Clear R0 on start-up. There is no guarantee that R0 is hardwired to zero,
 
    // and indeed it is not when simulating the or1200 Verilog core.
 
    l.andi  r0,r0,0x0
 
 
        l.movhi r1,hi(_stack)           /* Set up the stack */
        l.movhi r1,hi(_stack)           /* Set up the stack */
        l.ori   r1,r1,lo(_stack)
        l.ori   r1,r1,lo(_stack)
 
 
        l.j     _start                  /* Jump to the start of code */
        l.j     _start                  /* Jump to the start of code */
        l.nop
        l.nop

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