URL
https://opencores.org/ocsvn/rc4-prbs/rc4-prbs/trunk
[/] [rc4-prbs/] [trunk/] [rc4.v] - Diff between revs 8 and 10
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Rev 10 |
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You should have received a copy of the GNU Lesser General Public
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You should have received a copy of the GNU Lesser General Public
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License along with this library. If not, see <http://www.gnu.org/licenses/>.
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License along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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`include "rc4.inc"
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`include "/home/alfred/docto/FPGADesign/rc4-prbs/trunk/rc4.inc"
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module rc4(clk,rst,output_ready,password_input,K);
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module rc4(clk,rst,output_ready,password_input,K);
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input clk; // Clock
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input clk; // Clock
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input rst; // Reset
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input rst; // Reset
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Line 38... |
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// Key
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// Key
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reg [7:0] key[0:`KEY_SIZE-1];
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reg [7:0] key[0:`KEY_SIZE-1];
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// S array
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// S array
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reg [7:0] S[0:256];
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reg [7:0] S[0:256];
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reg [9:0] discardCount;
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// Key-scheduling state
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// Key-scheduling state
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`define KSS_KEYREAD 4'h0
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`define KSS_KEYREAD 4'h0
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`define KSS_KEYSCHED1 4'h1
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`define KSS_KEYSCHED1 4'h1
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`define KSS_KEYSCHED2 4'h2
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`define KSS_KEYSCHED2 4'h2
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if (i == 8'hFF)
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if (i == 8'hFF)
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begin
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begin
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KSState <= `KSS_CRYPTO;
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KSState <= `KSS_CRYPTO;
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i <= 8'h01;
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i <= 8'h01;
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j <= 8'h00;
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j <= 8'h00;
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discardCount <= 10'h0;
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end
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end
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else begin
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else begin
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i <= i + 1;
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i <= i + 1;
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KSState <= `KSS_KEYSCHED2;
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KSState <= `KSS_KEYSCHED2;
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end
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end
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end
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end
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`KSS_CRYPTO2: begin
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`KSS_CRYPTO2: begin
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S[i] <= S[j];
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S[i] <= S[j];
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S[j] <= S[i]; // We can do this because of verilog.
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S[j] <= S[i]; // We can do this because of verilog.
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K <= S[ S[i]+S[j] ];
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K <= S[ S[i]+S[j] ];
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output_ready <= 1; // Valid K at output
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if (discardCount<1000)
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discardCount<=discardCount+1;
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else output_ready <= 1; // Valid K at output
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i <= i+1;
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i <= i+1;
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KSState <= `KSS_CRYPTO;
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KSState <= `KSS_CRYPTO;
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end
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end
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default: begin
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default: begin
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end
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end
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