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[/] [rtf8088/] [trunk/] [rtl/] [verilog/] [DECODE.v] - Diff between revs 2 and 3

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Line 35... Line 35... 
 
 
 
 
        `DEC_REG,`INC_REG:
 
        `DEC_REG,`INC_REG:
 
                begin
 
                begin
 
                        w <= 1'b1;
 
                        w <= 1'b1;
 
                        rrr <= ir[2:0];
 
                        rrr <= ir[2:0];
 
                        state <= EXECUTE;
 
                        state <= REGFETCHA;
 
                end
 
                end
 
 
 
 
 
        `LEA: state <= EXECUTE;
 
        `LEA: state <= EXECUTE;
 
 
 
 
 
        //-----------------------------------------------------------------
 
        //-----------------------------------------------------------------

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