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[/] [rtf8088/] [trunk/] [rtl/] [verilog/] [IFETCH.v] - Diff between revs 7 and 8

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Rev 7 Rev 8
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//=============================================================================
//=============================================================================
//  Fetch instruction
//  Fetch instruction
//
//
//
//
//  (C) 2009,2010,2012 Robert Finch, Stratford
//  (C) 2009,2010,2012,2013 Robert Finch, Stratford
//  robfinch<remove>@opencores.org
//  robfinch<remove>@finitron.ca
//
//
//
//
// This source file is free software: you can redistribute it and/or modify 
// This source file is free software: you can redistribute it and/or modify 
// it under the terms of the GNU Lesser General Public License as published 
// it under the terms of the GNU Lesser General Public License as published 
// by the Free Software Foundation, either version 3 of the License, or     
// by the Free Software Foundation, either version 3 of the License, or     
Line 34... Line 34...
//
//
//=============================================================================
//=============================================================================
//
//
IFETCH:
IFETCH:
        begin
        begin
 
                $display("\r\n******************************************************");
 
                $display("time: %d", $time);
                $display("CSIP: %h", csip);
                $display("CSIP: %h", csip);
 
                $display("AX=%h  SI=%h", ax, si);
 
                $display("BX=%h  DI=%h", bx, di);
 
                $display("CX=%h  BP=%h", cx, bp);
 
                $display("DX=%h  SP=%h", dx, sp);
                // Reset all instruction processing flags at instruction fetch
                // Reset all instruction processing flags at instruction fetch
                cyc_type <= `CT_PASSIVE;
                cyc_type <= `CT_PASSIVE;
                mod <= 2'd0;
                mod <= 2'd0;
                rrr <= 3'd0;
                rrr <= 3'd0;
                rm <= 3'd0;
                rm <= 3'd0;
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        end
        end
 
 
IFETCH_ACK:
IFETCH_ACK:
        if (ack_i) begin
        if (ack_i) begin
                nack_ir();
                nack_ir();
                $display("IR: %h",dat_i);
                $display("CSIP: %h IR: %h",csip,dat_i);
                if (!hasPrefix)
                if (!hasPrefix)
                        ir_ip <= ip;
                        ir_ip <= ip;
//              ir_ip <= dat_i;
//              ir_ip <= dat_i;
                w <= dat_i[0];
                w <= dat_i[0];
                d <= dat_i[1];
                d <= dat_i[1];

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