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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [disp_io/] [sim/] [testbenches/] [xml/] [disp_io_def_tb.xml] - Diff between revs 134 and 135

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Rev 134 Rev 135
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//   You should have received a copy of the GNU Lesser General            //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
//                                                                        //
-->
-->
 
 
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
 
opencores.org
opencores.org
logic
logic
disp_io
disp_io
def_tb
def_tb
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  gen_verilog
  gen_verilog
  104.0
  104.0
  none
  none
  common
  :*common:*
  ./tools/verilog/gen_verilog
  tools/verilog/gen_verilog
  
  
    
    
      destination
      destination
      disp_io_def_tb
      disp_io_def_tb
    
    
  
  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
       
       
 
 
              
              
              Params
              Params
              
              
              
              
                                   spirit:library="logic"
                                   ipxact:library="logic"
                                   spirit:name="disp_io"
                                   ipxact:name="disp_io"
                                   spirit:version="def_dut.params"/>
                                   ipxact:version="def_dut.params"/>
             
             
              
              
 
 
 
 
 
 
 
 
              
              
              Bfm
              Bfm
              
              
                                   spirit:library="logic"
                                   ipxact:library="logic"
                                   spirit:name="disp_io"
                                   ipxact:name="disp_io"
                                   spirit:version="bfm.design"/>
                                   ipxact:version="bfm.design"/>
              
              
 
 
 
 
              
              
              icarus
              icarus
              
              
              
              
                                   spirit:library="Testbench"
                                   ipxact:library="Testbench"
                                   spirit:name="toolflow"
                                   ipxact:name="toolflow"
                                   spirit:version="icarus"/>
                                   ipxact:version="icarus"/>
              
              
              
              
 
 
 
 
 
 
 
 
              
              
              commoncommon
              common:*common:*
              Verilog
              Verilog
              
              
                     
                     
                            fs-common
                            fs-common
                     
                     
              
              
 
 
              
              
              sim:*Simulation:*
              sim:*Simulation:*
              Verilog
              Verilog
              
              
                     
                     
                            fs-sim
                            fs-sim
                     
                     
              
              
 
 
 
 
              
              
              lint:*Lint:*
              lint:*Lint:*
              Verilog
              Verilog
              
              
                     
                     
                            fs-sim
                            fs-sim
                     
                     
              
              
 
 
 
 
 
 
 
 
      
      
 
 
 
 
 
 
 
 
  
  
 
 
    
    
      fs-common
      fs-common
 
 
      
      
        
        
        ../verilog/tb.ext
        ../verilog/tb.ext
        verilogSourcefragment
        verilogSourcefragment
      
      
 
 
 
 
    
    
 
 
 
 
 
 
    
    
      fs-sim
      fs-sim
 
 
      
      
        
        
        ../verilog/common/disp_io_def_tb
        ../verilog/common/disp_io_def_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
 
 
 
 
    
    
 
 
 
 
    
    
      fs-lint
      fs-lint
 
 
      
      
        
        
        ../verilog/common/disp_io_def_tb
        ../verilog/common/disp_io_def_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
 
 
    
    
 
 
 
 
 
 
 
 
  
  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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