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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [vga_char_ctrl/] [rtl/] [xml/] [vga_char_ctrl_def.design.xml] - Diff between revs 134 and 135

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Rev 134 Rev 135
Line 25... Line 25...
//   You should have received a copy of the GNU Lesser General            //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
//                                                                        //
-->
-->
 
 
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
 
opencores.org
opencores.org
logic
logic
vga_char_ctrl
vga_char_ctrl
def.design
def.design
 
 
 
 
 
 
 
 
 
 
Line 47... Line 47...
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
pixel_count
pixel_count
wire
wire
 
 
100
100
 
 
 
 
 
 
line_count
line_count
wire
wire
 
 
90
90
 
 
 
 
 
 
subchar_pixel
subchar_pixel
wire
wire
 
 
20
20
 
 
 
 
subchar_line
subchar_line
wire
wire
 
 
20
20
 
 
 
 
 
 
char_column
char_column
wire
wire
 
 
60
60
 
 
 
 
 
 
char_line
char_line
wire
wire
 
 
60
60
 
 
 
 
 
 
 
 
 
 
 
 
 
 
cursor_on
cursor_on
reg
reg
 
 
 
 
 
 
 
 
 
 
char_read_addr
char_read_addr
reg
reg
 
 
130
130
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
     
     
       clk
       clk
       
       
       
       
       
       
     
     
 
 
 
 
     
     
       address
       address
       
       
       
       
     
     
 
 
     
     
       char_read_addr
       char_read_addr
       
       
       
       
     
     
 
 
 
 
     
     
       ascii_load
       ascii_load
       
       
       
       
     
     
 
 
 
 
     
     
       wdata
       wdata
       
       
       
       
     
     
 
 
     
     
       ascii_code
       ascii_code
       
       
       
       
     
     
 
 
 
 
 
 
 
 
     
     
       char_gen_rom_data
       char_gen_rom_data
       
       
       
       
     
     
 
 
 
 
     
     
       chargen_rom_address
       chargen_rom_address
       
       
       
       
     
     
 
 
 
 
 
 
 
 
 
 
     
     
       
       
       
       
       
       
       
       
     
     
 
 
     
     
        
        
     
     
 
 
     
     
        
        
     
     
 
 
     
     
        
        
     
     
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Line 221... Line 221...
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
char_ram 
char_ram 
 
 
 
 
CHAR_RAM_ADDR
CHAR_RAM_ADDR
CHAR_RAM_WIDTH
CHAR_RAM_WIDTH
CHAR_RAM_WORDS
CHAR_RAM_WORDS
CHAR_RAM_WRITETHRU
CHAR_RAM_WRITETHRU
 
 
 
 
 
 
 
 
 
 
 
 
char_gen_rom 
char_gen_rom 
 
 
 
 
11
11
8
8
1152
1152
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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