URL
https://opencores.org/ocsvn/socgen/socgen/trunk
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// Generated File Do Not EDIT //
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// Generated File Do Not EDIT //
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// //
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// //
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// regen by adding -tb to gen_verilog script //
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// regen by adding -tb to gen_verilog script //
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// //
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// //
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-->
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-->
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
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xmlns:socgen="http://opencores.org"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
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opencores.org
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opencores.org
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cde
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cde
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jtag
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jtag
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classic_rpc_in_reg_dutg.design
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classic_rpc_in_reg_dutg.design
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capture_dr
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capture_dr
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capture_value
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capture_value
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select
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select
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shift_dr
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shift_dr
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shiftcapture_dr_clk
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shiftcapture_dr_clk
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tdi
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tdi
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tdo
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tdo
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test_logic_reset
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test_logic_reset
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dut
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dut
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BITS
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BITS
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RESET_VALUE
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RESET_VALUE
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