/*!
|
/*!
|
intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.2
|
intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.2
|
Copyright (C) 2009-2011 ZTEX GmbH.
|
Copyright (C) 2009-2014 ZTEX GmbH.
|
http://www.ztex.de
|
http://www.ztex.de
|
|
|
This program is free software; you can redistribute it and/or modify
|
This program is free software; you can redistribute it and/or modify
|
it under the terms of the GNU General Public License version 3 as
|
it under the terms of the GNU General Public License version 3 as
|
published by the Free Software Foundation.
|
published by the Free Software Foundation.
|
|
|
This program is distributed in the hope that it will be useful, but
|
This program is distributed in the hope that it will be useful, but
|
WITHOUT ANY WARRANTY; without even the implied warranty of
|
WITHOUT ANY WARRANTY; without even the implied warranty of
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
General Public License for more details.
|
General Public License for more details.
|
|
|
You should have received a copy of the GNU General Public License
|
You should have received a copy of the GNU General Public License
|
along with this program; if not, see http://www.gnu.org/licenses/.
|
along with this program; if not, see http://www.gnu.org/licenses/.
|
!*/
|
!*/
|
|
|
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
|
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
|
#include[ztex-utils.h] // include basic functions
|
#include[ztex-utils.h] // include basic functions
|
|
|
// 1024 (instead of 512) byte bulk transfers.
|
// 1024 (instead of 512) byte bulk transfers.
|
// According to USB standard they are invalid but usually supported and 25% faster.
|
// According to USB standard they are invalid but usually supported and 25% faster.
|
//#define[fastmode]
|
//#define[fastmode]
|
|
|
#ifdef[fastmode]
|
#ifdef[fastmode]
|
// configure endpoint 2, in, quad buffered, 1024 bytes, interface 0
|
// configure endpoint 2, in, quad buffered, 1024 bytes, interface 0
|
EP_CONFIG(2,0,BULK,IN,1024,4);
|
EP_CONFIG(2,0,BULK,IN,1024,4);
|
#else
|
#else
|
// configure endpoint 2, in, quad buffered, 512 bytes, interface 0
|
// configure endpoint 2, in, quad buffered, 512 bytes, interface 0
|
EP_CONFIG(2,0,BULK,IN,512,4);
|
EP_CONFIG(2,0,BULK,IN,512,4);
|
#endif
|
#endif
|
|
|
// select ZTEX USB FPGA Module 1.2 as target (required for FPGA configuration)
|
// select ZTEX USB FPGA Module 1.2 as target (required for FPGA configuration)
|
IDENTITY_UFM_1_2(10.11.0.0,0);
|
IDENTITY_UFM_1_2(10.11.0.0,0);
|
|
|
// this product string is also used for identification by the host software
|
// this product string is also used for identification by the host software
|
#define[PRODUCT_STRING]["intraffic example for UFM 1.2"]
|
#define[PRODUCT_STRING]["intraffic example for UFM 1.2"]
|
|
|
// this is called automatically after FPGA configuration
|
// this is called automatically after FPGA configuration
|
#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG
|
#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG
|
IOA0 = 1; // reset on
|
IOA0 = 1; // reset on
|
IOA3 = 0; // controlled mode
|
IOA3 = 0; // controlled mode
|
OEA |= bmBIT0 | bmBIT3;
|
OEA |= bmBIT0 | bmBIT3;
|
|
|
EP2CS &= ~bmBIT0; // clear stall bit
|
EP2CS &= ~bmBIT0; // clear stall bit
|
|
|
REVCTL = 0x3;
|
REVCTL = 0x3;
|
SYNCDELAY;
|
SYNCDELAY;
|
|
|
IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface
|
IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface
|
SYNCDELAY;
|
SYNCDELAY;
|
EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE
|
EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE
|
SYNCDELAY;
|
SYNCDELAY;
|
|
|
#ifdef[fastmode]
|
#ifdef[fastmode]
|
EP2AUTOINLENH = 4; // 1024 bytes
|
EP2AUTOINLENH = 4; // 1024 bytes
|
#else
|
#else
|
EP2AUTOINLENH = 2; // 512 bytes
|
EP2AUTOINLENH = 2; // 512 bytes
|
#endif
|
#endif
|
SYNCDELAY;
|
SYNCDELAY;
|
EP2AUTOINLENL = 0;
|
EP2AUTOINLENL = 0;
|
SYNCDELAY;
|
SYNCDELAY;
|
|
|
FIFORESET = 0x80; // reset FIFO
|
FIFORESET = 0x80; // reset FIFO
|
SYNCDELAY;
|
SYNCDELAY;
|
FIFORESET = 2;
|
FIFORESET = 2;
|
SYNCDELAY;
|
SYNCDELAY;
|
FIFORESET = 0x00;
|
FIFORESET = 0x00;
|
SYNCDELAY;
|
SYNCDELAY;
|
|
|
FIFOPINPOLAR = 0;
|
FIFOPINPOLAR = 0;
|
SYNCDELAY;
|
SYNCDELAY;
|
PINFLAGSAB = 0;
|
PINFLAGSAB = 0;
|
SYNCDELAY;
|
SYNCDELAY;
|
PINFLAGSCD = 0;
|
PINFLAGSCD = 0;
|
SYNCDELAY;
|
SYNCDELAY;
|
|
|
IOA0 = 0; // reset off
|
IOA0 = 0; // reset off
|
]
|
]
|
|
|
// set mode
|
// set mode
|
ADD_EP0_VENDOR_COMMAND((0x60,,
|
ADD_EP0_VENDOR_COMMAND((0x60,,
|
IOA0 = 1; // reset on
|
IOA0 = 1; // reset on
|
IOA3 = SETUPDAT[2] ? 1 : 0;
|
IOA3 = SETUPDAT[2] ? 1 : 0;
|
IOA0 = 0; // reset off
|
IOA0 = 0; // reset off
|
,,
|
,,
|
NOP;
|
NOP;
|
));;
|
));;
|
|
|
// include the main part of the firmware kit, define the descriptors, ...
|
// include the main part of the firmware kit, define the descriptors, ...
|
#include[ztex.h]
|
#include[ztex.h]
|
|
|
void main(void)
|
void main(void)
|
{
|
{
|
init_USB();
|
init_USB();
|
|
|
while (1) {
|
while (1) {
|
}
|
}
|
}
|
}
|
|
|
|
|
