/*!
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/*!
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ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
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ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
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Copyright (C) 2009-2011 ZTEX GmbH.
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Copyright (C) 2009-2014 ZTEX GmbH.
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http://www.ztex.de
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http://www.ztex.de
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License version 3 as
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it under the terms of the GNU General Public License version 3 as
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published by the Free Software Foundation.
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published by the Free Software Foundation.
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This program is distributed in the hope that it will be useful, but
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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General Public License for more details.
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|
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, see http://www.gnu.org/licenses/.
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along with this program; if not, see http://www.gnu.org/licenses/.
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!*/
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!*/
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/*
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/*
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Configuration macros
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Configuration macros
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*/
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*/
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#ifndef[ZTEX_CONF_H]
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#ifndef[ZTEX_CONF_H]
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#define[ZTEX_CONF_H]
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#define[ZTEX_CONF_H]
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/*
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/*
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Don't expand macros in comments
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Don't expand macros in comments
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*/
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*/
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#disablelineinfo
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#disablelineinfo
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#define[//][
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#define[//][
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][#noexpand[!dnapxeon!]//$0!dnapxeon!
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][#noexpand[!dnapxeon!]//$0!dnapxeon!
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]
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]
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#disablelineinfo
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#disablelineinfo
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#define[/*][*/][#noexpand[!dnapxeon!]/*$0*/!dnapxeon!]
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#define[/*][*/][#noexpand[!dnapxeon!]/*$0*/!dnapxeon!]
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/*
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/*
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This macro defines the USB Vendor ID and USB Product ID (not the product ID
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This macro defines the USB Vendor ID and USB Product ID (not the product ID
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from the ZTEX descriptor). The Vendor ID must be purchased from the USB-IF
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from the ZTEX descriptor). The Vendor ID must be purchased from the USB-IF
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(http://www.usb.org).
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(http://www.usb.org).
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|
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The default vendor ID is the ZTEX vendor ID 0x221A, default product ID is
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The default vendor ID is the ZTEX vendor ID 0x221A, default product ID is
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0x100 which is assigned to ZTEX modules. These ID's can be shared by many
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0x100 which is assigned to ZTEX modules. These ID's can be shared by many
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different products which are identified by the product ID of the ZTEX
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different products which are identified by the product ID of the ZTEX
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descriptor. According to the USB-IF rules these ID's must not be used by
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descriptor. According to the USB-IF rules these ID's must not be used by
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hardware which is not manufactured by ZTEX. (Of course, this ID's can be
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hardware which is not manufactured by ZTEX. (Of course, this ID's can be
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used during the development process or for internal purposes.)
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used during the development process or for internal purposes.)
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|
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Please read the http://www.ztex.de/firmware-kit/usb_ids.e.html for more
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Please read the http://www.ztex.de/firmware-kit/usb_ids.e.html for more
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informations about this topic.
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informations about this topic.
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Usage:
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Usage:
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SET_VPID(<Vendor ID>,<Product ID>);
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SET_VPID(<Vendor ID>,<Product ID>);
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*/
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*/
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#define[SET_VPID(][,$1);][#define[USB_VENDOR_ID][$0]
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#define[SET_VPID(][,$1);][#define[USB_VENDOR_ID][$0]
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#define[USB_PRODUCT_ID][$1]]
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#define[USB_PRODUCT_ID][$1]]
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SET_VPID(0x221a,0x100);
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SET_VPID(0x221a,0x100);
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/*
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/*
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This macro is called before FPGA Firmware is reset, e.g. to save some
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This macro is called before FPGA Firmware is reset, e.g. to save some
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settings. After this macro is called the I/O ports are set to default
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settings. After this macro is called the I/O ports are set to default
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states in order to avoid damage during / after the FPGA configuration.
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states in order to avoid damage during / after the FPGA configuration.
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To append something to this macro use the following definition:
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To append something to this macro use the following definition:
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#define[PRE_FPGA_RESET][PRE_FPGA_RESET
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#define[PRE_FPGA_RESET][PRE_FPGA_RESET
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...]
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...]
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*/
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*/
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#define[PRE_FPGA_RESET][]
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#define[PRE_FPGA_RESET][]
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/*
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/*
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This macro is called after FPGA Firmware has been configured. This is
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This macro is called after FPGA Firmware has been configured. This is
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usually used to configure the I/O ports.
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usually used to configure the I/O ports.
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To append something to this macro use the following definition:
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To append something to this macro use the following definition:
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#define[POST_FW_LOAD][POST_FW_LOAD
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#define[POST_FW_LOAD][POST_FW_LOAD
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...]
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...]
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*/
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*/
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#define[POST_FPGA_CONFIG][]
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#define[POST_FPGA_CONFIG][]
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|
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/*
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/*
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On multi FPGA boards this macro is called betwen deselection and
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On multi FPGA boards this macro is called betwen deselection and
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selection of a FPGA. This can be used to store / resore I/O contents.
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selection of a FPGA. This can be used to store / resore I/O contents.
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To append something to this macro use the following definition:
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To append something to this macro use the following definition:
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#define[PRE_FPGA_SELECT][PRE_FPGA_SELECT
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#define[PRE_FPGA_SELECT][PRE_FPGA_SELECT
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...]
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...]
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*/
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*/
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#define[PRE_FPGA_SELECT][]
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#define[PRE_FPGA_SELECT][]
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/*
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/*
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Add a vedor request for endpoint 0,
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Add a vedor request for endpoint 0,
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Usage:
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Usage:
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ADD_EP0_VENDOR_REQUEST((<request number>,,<code executed after setup package received>,,<code executed after data package received>''));
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ADD_EP0_VENDOR_REQUEST((<request number>,,<code executed after setup package received>,,<code executed after data package received>''));
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Example:
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Example:
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ADD_EP0_VENDOR_REQUEST((0x33,,initHSFPGAConfiguration();,,));;
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ADD_EP0_VENDOR_REQUEST((0x33,,initHSFPGAConfiguration();,,));;
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...]
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...]
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*/
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*/
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#define[EP0_VENDOR_REQUESTS_SU;][]
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#define[EP0_VENDOR_REQUESTS_SU;][]
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#define[EP0_VENDOR_REQUESTS_DAT;][]
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#define[EP0_VENDOR_REQUESTS_DAT;][]
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#define[ADD_EP0_VENDOR_REQUEST((][,,$1,,$2));;][#define[EP0_VENDOR_REQUESTS_SU;][EP0_VENDOR_REQUESTS_SU;
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#define[ADD_EP0_VENDOR_REQUEST((][,,$1,,$2));;][#define[EP0_VENDOR_REQUESTS_SU;][EP0_VENDOR_REQUESTS_SU;
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case $0:
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case $0:
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$1
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$1
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break;
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break;
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]
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]
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#define[EP0_VENDOR_REQUESTS_DAT;][EP0_VENDOR_REQUESTS_DAT;
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#define[EP0_VENDOR_REQUESTS_DAT;][EP0_VENDOR_REQUESTS_DAT;
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case $0:
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case $0:
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$2
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$2
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break;
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break;
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]]
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]]
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/*
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/*
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Add a vedor command for endpoint 0,
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Add a vedor command for endpoint 0,
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|
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Usage:
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Usage:
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ADD_EP0_VENDOR_COMMAND((<request number>,,<code executed after setup package received>,,<code executed after data package received>''));
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ADD_EP0_VENDOR_COMMAND((<request number>,,<code executed after setup package received>,,<code executed after data package received>''));
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Example:
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Example:
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ADD_EP0_VENDOR_COMMAND((0x33,,initHSFPGAConfiguration();,,));;
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ADD_EP0_VENDOR_COMMAND((0x33,,initHSFPGAConfiguration();,,));;
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...]
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...]
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*/
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*/
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#define[EP0_VENDOR_COMMANDS_SU;][]
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#define[EP0_VENDOR_COMMANDS_SU;][]
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#define[EP0_VENDOR_COMMANDS_DAT;][]
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#define[EP0_VENDOR_COMMANDS_DAT;][]
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#define[ADD_EP0_VENDOR_COMMAND((][,,$1,,$2));;][#define[EP0_VENDOR_COMMANDS_SU;][EP0_VENDOR_COMMANDS_SU;
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#define[ADD_EP0_VENDOR_COMMAND((][,,$1,,$2));;][#define[EP0_VENDOR_COMMANDS_SU;][EP0_VENDOR_COMMANDS_SU;
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case $0:
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case $0:
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$1
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$1
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break;
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break;
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]
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]
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#define[EP0_VENDOR_COMMANDS_DAT;][EP0_VENDOR_COMMANDS_DAT;
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#define[EP0_VENDOR_COMMANDS_DAT;][EP0_VENDOR_COMMANDS_DAT;
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case $0:
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case $0:
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$2
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$2
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break;
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break;
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]]
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]]
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/*
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/*
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This macro generates a EP0 stall and aborts the current loop. Stalls are usually used to indicate errors.
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This macro generates a EP0 stall and aborts the current loop. Stalls are usually used to indicate errors.
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*/
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*/
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#define[EP0_STALL;][{
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#define[EP0_STALL;][{
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EP0CS |= 0x01; // set stall
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EP0CS |= 0x01; // set stall
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ep0_payload_remaining = 0;
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ep0_payload_remaining = 0;
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break;
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break;
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}]
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}]
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/*
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/*
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Endoint 1,2,4,5,8 configuration:
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Endoint 1,2,4,5,8 configuration:
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EP_CONFIG(<EP number>,<interface>,<type>,<direction>,<size>,<buffers>)
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EP_CONFIG(<EP number>,<interface>,<type>,<direction>,<size>,<buffers>)
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<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint number
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<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint number
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<INTERFACE> = 0 | 1 | 2 | 3 To which interface this endpoint belongs
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<INTERFACE> = 0 | 1 | 2 | 3 To which interface this endpoint belongs
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<type> = BULK | ISO | INT
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<type> = BULK | ISO | INT
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<dir> = IN | OUT
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<dir> = IN | OUT
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<size> = 512 | 1024
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<size> = 512 | 1024
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<buffers> = 1 | 2 | 3 | 4
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<buffers> = 1 | 2 | 3 | 4
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Example: EP_CONFIG(2,0,ISO,OUT,1024,4);
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Example: EP_CONFIG(2,0,ISO,OUT,1024,4);
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Important note: No spaces next to the commas
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Important note: No spaces next to the commas
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Endpoint 1 configuration:
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Endpoint 1 configuration:
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These Endpoints are defined by default as bulk endpoints and are assigned to interface 0.
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These Endpoints are defined by default as bulk endpoints and are assigned to interface 0.
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Endpoint size is always 64 bytes, but reported Endpoint size will be 512 bytes for USB 2.0 compliance.
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Endpoint size is always 64 bytes, but reported Endpoint size will be 512 bytes for USB 2.0 compliance.
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These Endpoints can be redefined using EP_CONFIG or using:
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These Endpoints can be redefined using EP_CONFIG or using:
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EP1IN_CONFIG(<interface>);
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EP1IN_CONFIG(<interface>);
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<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1IN belongs; default: 0
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<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1IN belongs; default: 0
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EP1OUT_CONFIG(<interface>);
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EP1OUT_CONFIG(<interface>);
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<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1OUT belongs; default: 0
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<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1OUT belongs; default: 0
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EP1_CONFIG(<interface>);
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EP1_CONFIG(<interface>);
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<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1IN and EP1OUT belongs; default: 0
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<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1IN and EP1OUT belongs; default: 0
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The following (maximum) configurations are possible:
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The following (maximum) configurations are possible:
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EP2 EP4 EP6 EP8
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EP2 EP4 EP6 EP8
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2x512 2x512 2x512 2x512
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2x512 2x512 2x512 2x512
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2x512 2x512 4x512
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2x512 2x512 4x512
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2x512 2x512 2x1024
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2x512 2x512 2x1024
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4x512 2x512 2x512
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4x512 2x512 2x512
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4x512 4x512
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4x512 4x512
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4x512 2x1024
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4x512 2x1024
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2x1024 2x512 2x512
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2x1024 2x512 2x512
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2x1024 4x512
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2x1024 4x512
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2x1024 2x1024
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2x1024 2x1024
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3x512 3x512 2x512
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3x512 3x512 2x512
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3x1024 2x512
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3x1024 2x512
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4x1024
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4x1024
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*/
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*/
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#define[EP_CONFIG(][,$1,$2,$3,$4,$5);][
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#define[EP_CONFIG(][,$1,$2,$3,$4,$5);][
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#ifeq[$0][1IN]
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#ifeq[$0][1IN]
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#elifeq[$0][1OUT]
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#elifeq[$0][1OUT]
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#elifeq[$0][2]
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#elifeq[$0][2]
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#elifeq[$0][4]
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#elifeq[$0][4]
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#elifeq[$0][6]
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#elifeq[$0][6]
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#elifneq[$0][8]
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#elifneq[$0][8]
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#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `2', `4', `6' or '8']
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#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `2', `4', `6' or '8']
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#endif
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#endif
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#ifeq[$1][0]
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#ifeq[$1][0]
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#elifeq[$1][1]
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#elifeq[$1][1]
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#elifeq[$1][2]
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#elifeq[$1][2]
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#elifneq[$1][3]
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#elifneq[$1][3]
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#error[EP_CONFIG: Invalid 2nd parameter: `$1'. Expected `0', `1', `2' or '3']
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#error[EP_CONFIG: Invalid 2nd parameter: `$1'. Expected `0', `1', `2' or '3']
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#endif
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#endif
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#ifeq[$2][BULK]
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#ifeq[$2][BULK]
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#elifeq[$2][ISO]
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#elifeq[$2][ISO]
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#elifneq[$2][INT]
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#elifneq[$2][INT]
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#error[EP_CONFIG: Invalid 3nd parameter: `$2'. Expected `BULK', `ISO' or 'INT']
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#error[EP_CONFIG: Invalid 3nd parameter: `$2'. Expected `BULK', `ISO' or 'INT']
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#endif
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#endif
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#ifeq[$3][IN]
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#ifeq[$3][IN]
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#elifneq[$3][OUT]
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#elifneq[$3][OUT]
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#error[EP_CONFIG: Invalid 4th parameter: `$3'. Expected `IN' or 'OUT']
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#error[EP_CONFIG: Invalid 4th parameter: `$3'. Expected `IN' or 'OUT']
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#endif
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#endif
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#ifeq[$4][512]
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#ifeq[$4][512]
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#elifneq[$4][1024]
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#elifneq[$4][1024]
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#error[EP_CONFIG: Invalid 5th parameter: `$4'. Expected `512' or '1024']
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#error[EP_CONFIG: Invalid 5th parameter: `$4'. Expected `512' or '1024']
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#endif
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#endif
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#ifeq[$5][1]
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#ifeq[$5][1]
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#elifeq[$5][2]
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#elifeq[$5][2]
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#elifeq[$5][3]
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#elifeq[$5][3]
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#elifneq[$5][4]
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#elifneq[$5][4]
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#error[EP_CONFIG: Invalid 6th parameter: `$5'. Expected `1', `2', `3' or `4']
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#error[EP_CONFIG: Invalid 6th parameter: `$5'. Expected `1', `2', `3' or `4']
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#endif
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#endif
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#define[EP$0_INTERFACE][$1]
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#define[EP$0_INTERFACE][$1]
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#define[EP$0_TYPE][$2]
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#define[EP$0_TYPE][$2]
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#define[EP$0_DIR][$3]
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#define[EP$0_DIR][$3]
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#define[EP$0_SIZE][$4]
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#define[EP$0_SIZE][$4]
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#define[EP$0_BUFFERS][$5]]
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#define[EP$0_BUFFERS][$5]]
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|
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#define[EP1IN_CONFIG(][);][#define[EP1IN_INTERFACE][$0]]
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#define[EP1IN_CONFIG(][);][#define[EP1IN_INTERFACE][$0]]
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#define[EP1OUT_CONFIG(][);][#define[EP1OUT_INTERFACE][$0]]
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#define[EP1OUT_CONFIG(][);][#define[EP1OUT_INTERFACE][$0]]
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#define[EP1_CONFIG(][);][#define[EP1IN_INTERFACE][$0]
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#define[EP1_CONFIG(][);][#define[EP1IN_INTERFACE][$0]
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#define[EP1OUT_INTERFACE][$0]]
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#define[EP1OUT_INTERFACE][$0]]
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|
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EP_CONFIG(1IN,0,BULK,IN,512,1);
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EP_CONFIG(1IN,0,BULK,IN,512,1);
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EP_CONFIG(1OUT,0,BULK,OUT,512,1);
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EP_CONFIG(1OUT,0,BULK,OUT,512,1);
|
|
|
/*
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/*
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ISO and INT Transactions per microframe:
|
ISO and INT Transactions per microframe:
|
|
|
Default value is 1 for all endpoints.
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Default value is 1 for all endpoints.
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|
|
EP_PPMF(<EP number>,<transactions per microframe>)
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EP_PPMF(<EP number>,<transactions per microframe>)
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<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint
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<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint
|
<transactions per microframe> = 1 | 2 | 3 Transactions per microframe
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<transactions per microframe> = 1 | 2 | 3 Transactions per microframe
|
|
|
Example: EP_PPMF(2,3);
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Example: EP_PPMF(2,3);
|
Important note: No spaces next to the commas
|
Important note: No spaces next to the commas
|
*/
|
*/
|
#define[EP_PPMF(][,$1);][
|
#define[EP_PPMF(][,$1);][
|
#ifeq[$0][1IN]
|
#ifeq[$0][1IN]
|
#elifeq[$0][1OUT]
|
#elifeq[$0][1OUT]
|
#elifeq[$0][2]
|
#elifeq[$0][2]
|
#elifeq[$0][4]
|
#elifeq[$0][4]
|
#elifeq[$0][6]
|
#elifeq[$0][6]
|
#elifneq[$0][8]
|
#elifneq[$0][8]
|
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
|
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
|
#endif
|
#endif
|
#ifeq[$1][1]
|
#ifeq[$1][1]
|
#elifeq[$1][2]
|
#elifeq[$1][2]
|
#elifneq[$1][3]
|
#elifneq[$1][3]
|
#error[EP_CONFIG: Invalid 2nd parameter: `$1'. Expected `1', `2' or '3']
|
#error[EP_CONFIG: Invalid 2nd parameter: `$1'. Expected `1', `2' or '3']
|
#endif
|
#endif
|
#define[EP$0_PPMF][$1]]
|
#define[EP$0_PPMF][$1]]
|
|
|
EP_PPMF(1IN,1);
|
EP_PPMF(1IN,1);
|
EP_PPMF(1OUT,1);
|
EP_PPMF(1OUT,1);
|
EP_PPMF(2,1);
|
EP_PPMF(2,1);
|
EP_PPMF(4,1);
|
EP_PPMF(4,1);
|
EP_PPMF(6,1);
|
EP_PPMF(6,1);
|
EP_PPMF(8,1);
|
EP_PPMF(8,1);
|
|
|
/*
|
/*
|
Polling interval in microframes for INT transactions:
|
Polling interval in microframes for INT transactions:
|
|
|
Default value is 1 for all endpoints.
|
Default value is 1 for all endpoints.
|
|
|
EP_POLL(<EP number>,<polling interval>)
|
EP_POLL(<EP number>,<polling interval>)
|
<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint
|
<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint
|
<polling interval> = 1 | 2 | 3 Polling interval
|
<polling interval> = 1 | 2 | 3 Polling interval
|
|
|
Example: EP_POLL(2,1);
|
Example: EP_POLL(2,1);
|
Important note: No spaces next to the commas
|
Important note: No spaces next to the commas
|
*/
|
*/
|
#define[EP_POLL(][,$1);][
|
#define[EP_POLL(][,$1);][
|
#ifeq[$0][1IN]
|
#ifeq[$0][1IN]
|
#elifeq[$0][1OUT]
|
#elifeq[$0][1OUT]
|
#elifeq[$0][2]
|
#elifeq[$0][2]
|
#elifeq[$0][4]
|
#elifeq[$0][4]
|
#elifeq[$0][6]
|
#elifeq[$0][6]
|
#elifneq[$0][8]
|
#elifneq[$0][8]
|
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
|
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
|
#endif
|
#endif
|
#define[EP$0_POLL][$1]]
|
#define[EP$0_POLL][$1]]
|
|
|
EP_POLL(1IN,1);
|
EP_POLL(1IN,1);
|
EP_POLL(1OUT,1);
|
EP_POLL(1OUT,1);
|
EP_POLL(2,1);
|
EP_POLL(2,1);
|
EP_POLL(4,1);
|
EP_POLL(4,1);
|
EP_POLL(6,1);
|
EP_POLL(6,1);
|
EP_POLL(8,1);
|
EP_POLL(8,1);
|
|
|
|
|
|
|
/*
|
/*
|
Settings which depends PRODUCT_ID, e.g extra capabilities.
|
Settings which depends PRODUCT_ID, e.g extra capabilities.
|
Overwrite this macros as desired.
|
Overwrite this macros as desired.
|
*/
|
*/
|
#define[MODULE_RESERVED_00][0]
|
#define[MODULE_RESERVED_00][0]
|
#define[MODULE_RESERVED_01][0]
|
#define[MODULE_RESERVED_01][0]
|
#define[MODULE_RESERVED_02][0]
|
#define[MODULE_RESERVED_02][0]
|
#define[MODULE_RESERVED_03][0]
|
#define[MODULE_RESERVED_03][0]
|
#define[MODULE_RESERVED_04][0]
|
#define[MODULE_RESERVED_04][0]
|
#define[MODULE_RESERVED_05][0]
|
#define[MODULE_RESERVED_05][0]
|
#define[MODULE_RESERVED_06][0]
|
#define[MODULE_RESERVED_06][0]
|
#define[MODULE_RESERVED_07][0]
|
#define[MODULE_RESERVED_07][0]
|
#define[MODULE_RESERVED_08][0]
|
#define[MODULE_RESERVED_08][0]
|
#define[MODULE_RESERVED_09][0]
|
#define[MODULE_RESERVED_09][0]
|
#define[MODULE_RESERVED_10][0]
|
#define[MODULE_RESERVED_10][0]
|
#define[MODULE_RESERVED_11][0]
|
#define[MODULE_RESERVED_11][0]
|
|
|
#define[FWVER][0]
|
#define[FWVER][0]
|
|
|
#define[PRODUCT_ID_0][0]
|
#define[PRODUCT_ID_0][0]
|
#define[PRODUCT_ID_1][0]
|
#define[PRODUCT_ID_1][0]
|
#define[PRODUCT_ID_2][0]
|
#define[PRODUCT_ID_2][0]
|
#define[PRODUCT_ID_3][0]
|
#define[PRODUCT_ID_3][0]
|
|
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 1.0
|
Identify as ZTEX USB FPGA Module 1.0
|
Usage: IDENTITY_UFM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-1_0]
|
#define[PRODUCT_IS][UFM-1_0]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.0"]]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.0"]]
|
|
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 1.1
|
Identify as ZTEX USB FPGA Module 1.1
|
Usage: IDENTITY_UFM_1_1(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_1_1(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_1_1(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_1_1(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-1_1]
|
#define[PRODUCT_IS][UFM-1_1]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.1"]]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.1"]]
|
|
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 1.2
|
Identify as ZTEX USB FPGA Module 1.2
|
Usage: IDENTITY_UFM_1_2(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_1_2(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_1_2(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_1_2(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-1_2]
|
#define[PRODUCT_IS][UFM-1_2]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.2"]]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.2"]]
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 1.10
|
Identify as ZTEX USB FPGA Module 1.10
|
Usage: IDENTITY_UFM_1_10(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_1_10(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_1_10(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_1_10(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-1_10]
|
#define[PRODUCT_IS][UFM-1_10]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.10"]]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.10"]]
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 1.11
|
Identify as ZTEX USB FPGA Module 1.11
|
Usage: IDENTITY_UFM_1_11(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_1_11(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_1_11(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_1_11(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-1_11]
|
#define[PRODUCT_IS][UFM-1_11]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.11"]]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.11"]]
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 1.15
|
Identify as ZTEX USB FPGA Module 1.15
|
Usage: IDENTITY_UFM_1_15(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_1_15(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_1_15(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_1_15(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-1_15]
|
#define[PRODUCT_IS][UFM-1_15]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.15"]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.15"]
|
#define[NUMBER_OF_FPGAS][1]]
|
#define[NUMBER_OF_FPGAS][1]]
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 1.15y
|
Identify as ZTEX USB FPGA Module 1.15y
|
Usage: IDENTITY_UFM_1_15Y(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_1_15Y(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_1_15Y(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_1_15Y(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-1_15Y]
|
#define[PRODUCT_IS][UFM-1_15Y]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.15y"]
|
#define[PRODUCT_STRING]["USB-FPGA Module 1.15y"]
|
#define[NUMBER_OF_FPGAS][4]]
|
#define[NUMBER_OF_FPGAS][4]]
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 2.16
|
Identify as ZTEX USB FPGA Module 2.16
|
Usage: IDENTITY_UFM_2_16(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_2_16(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_2_16(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_2_16(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-2_16]
|
#define[PRODUCT_IS][UFM-2_16]
|
#define[PRODUCT_STRING]["USB-FPGA Module 2.16"]
|
#define[PRODUCT_STRING]["USB-FPGA Module 2.16"]
|
#define[NUMBER_OF_FPGAS][1]]
|
#define[NUMBER_OF_FPGAS][1]]
|
|
|
/*
|
/*
|
Identify as ZTEX USB FPGA Module 2.13
|
Identify as ZTEX USB FPGA Module 2.13
|
Usage: IDENTITY_UFM_2_13(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UFM_2_13(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UFM_2_13(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UFM_2_13(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UFM-2_13]
|
#define[PRODUCT_IS][UFM-2_13]
|
#define[PRODUCT_STRING]["USB-FPGA Module 2.13"]
|
#define[PRODUCT_STRING]["USB-FPGA Module 2.13"]
|
#define[NUMBER_OF_FPGAS][1]]
|
#define[NUMBER_OF_FPGAS][1]]
|
|
|
/*
|
/*
|
Identify as ZTEX USB Module 1.0
|
Identify as ZTEX USB Module 1.0
|
Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UM-1_0]
|
#define[PRODUCT_IS][UM-1_0]
|
#define[PRODUCT_STRING]["USB Module 1.0"]]
|
#define[PRODUCT_STRING]["USB Module 1.0"]]
|
|
|
|
|
/*
|
/*
|
Identify as ZTEX USB XMEGA Module 1.0
|
Identify as ZTEX USB XMEGA Module 1.0
|
Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
|
*/
|
*/
|
#define[IDENTITY_UXM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[IDENTITY_UXM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_1][$1]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_2][$2]
|
#define[PRODUCT_ID_3][$3]
|
#define[PRODUCT_ID_3][$3]
|
#define[FWVER][$4]
|
#define[FWVER][$4]
|
#define[PRODUCT_IS][UXM-1_0]
|
#define[PRODUCT_IS][UXM-1_0]
|
#define[PRODUCT_STRING]["USB XMEGA Module 1.0"]]
|
#define[PRODUCT_STRING]["USB XMEGA Module 1.0"]]
|
|
|
|
|
/*
|
/*
|
This macro defines the Manufacturer string. Limited to 31 characters.
|
This macro defines the Manufacturer string. Limited to 31 characters.
|
*/
|
*/
|
#define[MANUFACTURER_STRING]["ZTEX"]
|
#define[MANUFACTURER_STRING]["ZTEX"]
|
|
|
|
|
/*
|
/*
|
This macro defines the Product string. Limited to 31 characters.
|
This macro defines the Product string. Limited to 31 characters.
|
*/
|
*/
|
#define[PRODUCT_STRING]["USB-FPGA Module"]
|
#define[PRODUCT_STRING]["USB-FPGA Module"]
|
|
|
/*
|
/*
|
This macro enables defines the Configuration string. Limited to 31 characters.
|
This macro enables defines the Configuration string. Limited to 31 characters.
|
*/
|
*/
|
#define[CONFIGURATION_STRING]["default"]
|
#define[CONFIGURATION_STRING]["default"]
|
|
|
|
|
/*
|
/*
|
This macro disables EEPROM interface, I2C helper functions and all other I2C devices (enabled by default)
|
This macro disables EEPROM interface, I2C helper functions and all other I2C devices (enabled by default)
|
Usage: DISABLE_EEPROM;
|
Usage: DISABLE_EEPROM;
|
*/
|
*/
|
#define[DISABLE_EEPROM;][#define[EEPROM_DISABLED][1]]
|
#define[DISABLE_EEPROM;][#define[EEPROM_DISABLED][1]]
|
|
|
|
|
/*
|
/*
|
This macro enables the Flash interface, if available
|
This macro enables the Flash interface, if available
|
Usage: ENABLE_FLASH;
|
Usage: ENABLE_FLASH;
|
*/
|
*/
|
#define[ENABLE_FLASH;][#define[FLASH_ENABLED][1]]
|
#define[ENABLE_FLASH;][#define[FLASH_ENABLED][1]]
|
|
|
/*
|
/*
|
This macro enables the FPGA configuration using a bitstream from the Flash memory
|
This macro enables the FPGA configuration using a bitstream from the Flash memory
|
Usage: ENABLE_FLASH_BITSTREAM;
|
Usage: ENABLE_FLASH_BITSTREAM;
|
*/
|
*/
|
#define[ENABLE_FLASH_BITSTREAM;][#define[FLASH_BITSTREAM_ENABLED][1]]
|
#define[ENABLE_FLASH_BITSTREAM;][#define[FLASH_BITSTREAM_ENABLED][1]]
|
|
|
/*
|
/*
|
Define this macro to use 4k sectors instead of 64k sectors of SPI Flash, if possible
|
Define this macro to use 4k sectors instead of 64k sectors of SPI Flash, if possible
|
This is usually much slower and only recommended if you do not use the Flash for storing the Bitstream.
|
This is usually much slower and only recommended if you do not use the Flash for storing the Bitstream.
|
Usage: USE_4KSECTORS;
|
Usage: USE_4KSECTORS;
|
*/
|
*/
|
#define[USE_4KSECTORS;][#define[USE_4KSECTORS_ENABLED][1]]
|
#define[USE_4KSECTORS;][#define[USE_4KSECTORS_ENABLED][1]]
|
|
|
/*
|
/*
|
This enables the debug helper. The debug helper consists in a stack of messages which can be read out from host software.
|
This enables the debug helper. The debug helper consists in a stack of messages which can be read out from host software.
|
See ../examples/all/debug/Readme.
|
See ../examples/all/debug/Readme.
|
Usage: ENABLE_DEBUG(<stack size>,<message_size>);
|
Usage: ENABLE_DEBUG(<stack size>,<message_size>);
|
<stack size> number of messages in stack
|
<stack size> number of messages in stack
|
<message size> message size in bytes
|
<message size> message size in bytes
|
*/
|
*/
|
#define[ENABLE_DEBUG(][,$1);][#define[DEBUG_ENABLED][1]
|
#define[ENABLE_DEBUG(][,$1);][#define[DEBUG_ENABLED][1]
|
#define[DEBUG_STACK_SIZE][$0]
|
#define[DEBUG_STACK_SIZE][$0]
|
#define[DEBUG_MSG_SIZE][$1]]
|
#define[DEBUG_MSG_SIZE][$1]]
|
|
|
/*
|
/*
|
This macro disables XMEGA support, if available
|
This macro disables XMEGA support, if available
|
Usage: XMEGA_DISABLE;
|
Usage: XMEGA_DISABLE;
|
*/
|
*/
|
#define[XMEGA_DISABLE;][#define[XMEGA_DISABLED][1]]
|
#define[XMEGA_DISABLE;][#define[XMEGA_DISABLED][1]]
|
|
|
/*
|
/*
|
Enables support for ZTEX Experimantal Board 1.10
|
Enables support for ZTEX Experimantal Board 1.10
|
Usage: EXTENSION_EXP_1_10;
|
Usage: EXTENSION_EXP_1_10;
|
*/
|
*/
|
#define[EXTENSION_EXP_1_10;][#define[EXP_1_10_ENABLED][1]]
|
#define[EXTENSION_EXP_1_10;][#define[EXP_1_10_ENABLED][1]]
|
|
|
/*
|
/*
|
Enables high speed FPGA configuration for ZTEX USB-FPGA Module 1.15 and 1.15y
|
Enables high speed FPGA configuration for ZTEX USB-FPGA Module 1.15 and 1.15y
|
Usage: ENABLE_HS_FPGA_CONF(<ENDPOINT>);
|
Usage: ENABLE_HS_FPGA_CONF(<ENDPOINT>);
|
<endpoint> endpoint which shall be used (any bulk output can be used)
|
<endpoint> endpoint which shall be used (any bulk output can be used)
|
*/
|
*/
|
#define[ENABLE_HS_FPGA_CONF(][);][
|
#define[ENABLE_HS_FPGA_CONF(][);][
|
#ifeq[$0][2]
|
#ifeq[$0][2]
|
#elifeq[$0][4]
|
#elifeq[$0][4]
|
#elifeq[$0][6]
|
#elifeq[$0][6]
|
#elifneq[$0][8]
|
#elifneq[$0][8]
|
#error[ENABLE_HS_FPGA_CONF: Invalid Endpoint. Valid values are: `2', `4', `6', `8'.]
|
#error[ENABLE_HS_FPGA_CONF: Invalid Endpoint. Valid values are: `2', `4', `6', `8'.]
|
#endif
|
#endif
|
#define[HS_FPGA_CONF_EP][$0]]
|
#define[HS_FPGA_CONF_EP][$0]]
|
|
|
/*
|
/*
|
This macro disables MAC EEPROM support, if available
|
This macro disables MAC EEPROM support, if available
|
Usage: MAC_EEPROM_DISABLE;
|
Usage: MAC_EEPROM_DISABLE;
|
*/
|
*/
|
#define[DISABLE_MAC_EEPROM;][#define[EEPROM_MAC_DISABLED][1]]
|
#define[DISABLE_MAC_EEPROM;][#define[EEPROM_MAC_DISABLED][1]]
|
|
|
/*
|
/*
|
Enables detection of USB-FPGA Modules 1.15x. This avoids some warnings and makes the variable is_ufm_1_15x available.
|
Enables detection of USB-FPGA Modules 1.15x. This avoids some warnings and makes the variable is_ufm_1_15x available.
|
Usage: ENABLE_UFM_1_15X_DETECTION;
|
Usage: ENABLE_UFM_1_15X_DETECTION;
|
*/
|
*/
|
#define[ENABLE_UFM_1_15X_DETECTION;][#define[UFM_1_15X_DETECTION_ENABLED][1]]
|
#define[ENABLE_UFM_1_15X_DETECTION;][#define[UFM_1_15X_DETECTION_ENABLED][1]]
|
|
|
/*
|
/*
|
This macro disables temperature sensor support
|
This macro disables temperature sensor support
|
Usage: TEMP_SENSOR_DISABLE;
|
Usage: TEMP_SENSOR_DISABLE;
|
*/
|
*/
|
#define[TEMP_SENSOR_DISABLE;][#define[TEMP_SENSOR_DISABLED][1]]
|
#define[TEMP_SENSOR_DISABLE;][#define[TEMP_SENSOR_DISABLED][1]]
|
|
|
#endif // ZTEX_CONF_H
|
#endif // ZTEX_CONF_H
|
|
|
