| Line 115... |
Line 115... |
//
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//
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// To implement this, we set our 'address' to zero any time the
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// To implement this, we set our 'address' to zero any time the
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// data changes, but increment it on all other clocks. Should the
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// data changes, but increment it on all other clocks. Should the
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// address difference get to our maximum value, we let it saturate
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// address difference get to our maximum value, we let it saturate
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// rather than overflow.
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// rather than overflow.
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reg [(BUSW-2):0] ck_addr;
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reg [(BUSW-2):0] ck_addr, lst_dat;
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initial ck_addr = 0;
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initial ck_addr = 0;
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always @(posedge i_clk)
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always @(posedge i_clk)
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if ((lcl_reset)||((i_ce)&&(i_data != lst_data)))
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if ((lcl_reset)||((i_ce)&&(i_data != lst_dat)))
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ck_addr <= 0;
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ck_addr <= 0;
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else if (&ck_addr)
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else if (&ck_addr)
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; // Saturated (non-overflowing) address diff
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; // Saturated (non-overflowing) address diff
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else
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else
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ck_addr <= ck_addr + 1;
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ck_addr <= ck_addr + 1;
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| Line 131... |
Line 131... |
// To do our compression, we keep track of two registers: the most
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// To do our compression, we keep track of two registers: the most
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// recent data to the device (imm_ prefix) and the data from one
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// recent data to the device (imm_ prefix) and the data from one
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// clock ago. This allows us to suppress writes to the scope which
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// clock ago. This allows us to suppress writes to the scope which
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// would otherwise be two address writes in a row.
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// would otherwise be two address writes in a row.
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reg imm_adr, lst_adr; // Is this an address (1'b1) or data value?
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reg imm_adr, lst_adr; // Is this an address (1'b1) or data value?
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reg [(BUSW-2):0] lst_dat, // The data associated with t-1
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reg [(BUSW-2):0] lst_val, // Data for the scope, delayed by one
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lst_val, // Data for the scope, delayed by one
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imm_val; // Data to write to the scope
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imm_val; // Data to write to the scope
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initial lst_dat = 0;
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initial lst_dat = 0;
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initial lst_adr = 1'b1;
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initial lst_adr = 1'b1;
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initial imm_adr = 1'b1;
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initial imm_adr = 1'b1;
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always @(posedge i_clk)
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always @(posedge i_clk)
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