| Line 44... |
Line 44... |
// Inputs
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// Inputs
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wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_we_i, wb_stb_i, wb_cyc_i,
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wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_we_i, wb_stb_i, wb_cyc_i,
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status_crc_error, status_fragment_error, status_txdfifo_ovflow,
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status_crc_error, status_fragment_error, status_txdfifo_ovflow,
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status_txdfifo_udflow, status_rxdfifo_ovflow, status_rxdfifo_udflow,
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status_txdfifo_udflow, status_rxdfifo_ovflow, status_rxdfifo_udflow,
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status_pause_frame_rx, status_local_fault, status_remote_fault,
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status_pause_frame_rx, status_local_fault, status_remote_fault,
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stats_tx_pkts, stats_rx_pkts
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stats_tx_octets, stats_tx_pkts, stats_rx_octets, stats_rx_pkts
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);
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);
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input wb_clk_i;
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input wb_clk_i;
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input wb_rst_i;
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input wb_rst_i;
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| Line 77... |
Line 77... |
input status_pause_frame_rx;
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input status_pause_frame_rx;
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input status_local_fault;
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input status_local_fault;
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input status_remote_fault;
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input status_remote_fault;
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input [31:0] stats_tx_octets;
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input [31:0] stats_tx_pkts;
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input [31:0] stats_tx_pkts;
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input [31:0] stats_rx_octets;
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input [31:0] stats_rx_pkts;
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input [31:0] stats_rx_pkts;
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output ctrl_tx_enable;
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output ctrl_tx_enable;
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| Line 188... |
Line 191... |
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`CPUREG_INT_MASK: begin
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`CPUREG_INT_MASK: begin
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wb_dat_o <= {23'b0, cpureg_int_mask};
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wb_dat_o <= {23'b0, cpureg_int_mask};
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end
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end
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`CPUREG_STATSTXOCTETS: begin
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wb_dat_o <= stats_tx_octets;
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end
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`CPUREG_STATSTXPKTS: begin
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`CPUREG_STATSTXPKTS: begin
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wb_dat_o <= stats_tx_pkts;
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wb_dat_o <= stats_tx_pkts;
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end
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end
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`CPUREG_STATSRXOCTETS: begin
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wb_dat_o <= stats_rx_octets;
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end
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`CPUREG_STATSRXPKTS: begin
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`CPUREG_STATSRXPKTS: begin
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wb_dat_o <= stats_rx_pkts;
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wb_dat_o <= stats_rx_pkts;
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end
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end
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default: begin
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default: begin
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