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Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [xge_mac.v] - Diff between revs 24 and 27

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Rev 24 Rev 27
Line 92... Line 92...
output [63:0]           xgmii_txd;              // From tx_dq0 of tx_dequeue.v
output [63:0]           xgmii_txd;              // From tx_dq0 of tx_dequeue.v
// End of automatics
// End of automatics
 
 
/*AUTOWIRE*/
/*AUTOWIRE*/
// Beginning of automatic wires (for undeclared instantiated-module outputs)
// Beginning of automatic wires (for undeclared instantiated-module outputs)
 
wire                    clear_stats_rx_octets;  // From wishbone_if0 of wishbone_if.v
 
wire                    clear_stats_rx_pkts;    // From wishbone_if0 of wishbone_if.v
 
wire                    clear_stats_tx_octets;  // From wishbone_if0 of wishbone_if.v
 
wire                    clear_stats_tx_pkts;    // From wishbone_if0 of wishbone_if.v
wire                    ctrl_tx_enable;         // From wishbone_if0 of wishbone_if.v
wire                    ctrl_tx_enable;         // From wishbone_if0 of wishbone_if.v
wire                    ctrl_tx_enable_ctx;     // From sync_clk_xgmii_tx0 of sync_clk_xgmii_tx.v
wire                    ctrl_tx_enable_ctx;     // From sync_clk_xgmii_tx0 of sync_clk_xgmii_tx.v
wire [1:0]              local_fault_msg_det;    // From rx_eq0 of rx_enqueue.v
wire [1:0]              local_fault_msg_det;    // From rx_eq0 of rx_enqueue.v
wire [1:0]              remote_fault_msg_det;   // From rx_eq0 of rx_enqueue.v
wire [1:0]              remote_fault_msg_det;   // From rx_eq0 of rx_enqueue.v
wire                    rxdfifo_ralmost_empty;  // From rx_data_fifo0 of rx_data_fifo.v
wire                    rxdfifo_ralmost_empty;  // From rx_data_fifo0 of rx_data_fifo.v
Line 376... Line 380...
             .stats_rx_octets           (stats_rx_octets[31:0]),
             .stats_rx_octets           (stats_rx_octets[31:0]),
             .stats_rx_pkts             (stats_rx_pkts[31:0]),
             .stats_rx_pkts             (stats_rx_pkts[31:0]),
             .stats_tx_octets           (stats_tx_octets[31:0]),
             .stats_tx_octets           (stats_tx_octets[31:0]),
             .stats_tx_pkts             (stats_tx_pkts[31:0]),
             .stats_tx_pkts             (stats_tx_pkts[31:0]),
             // Inputs
             // Inputs
 
             .clear_stats_rx_octets     (clear_stats_rx_octets),
 
             .clear_stats_rx_pkts       (clear_stats_rx_pkts),
 
             .clear_stats_tx_octets     (clear_stats_tx_octets),
 
             .clear_stats_tx_pkts       (clear_stats_tx_pkts),
             .clk_xgmii_rx              (clk_xgmii_rx),
             .clk_xgmii_rx              (clk_xgmii_rx),
             .clk_xgmii_tx              (clk_xgmii_tx),
             .clk_xgmii_tx              (clk_xgmii_tx),
             .reset_xgmii_rx_n          (reset_xgmii_rx_n),
             .reset_xgmii_rx_n          (reset_xgmii_rx_n),
             .reset_xgmii_tx_n          (reset_xgmii_tx_n),
             .reset_xgmii_tx_n          (reset_xgmii_tx_n),
             .rxsfifo_wdata             (rxsfifo_wdata[13:0]),
             .rxsfifo_wdata             (rxsfifo_wdata[13:0]),
Line 398... Line 406...
                         // Outputs
                         // Outputs
                         .wb_dat_o              (wb_dat_o[31:0]),
                         .wb_dat_o              (wb_dat_o[31:0]),
                         .wb_ack_o              (wb_ack_o),
                         .wb_ack_o              (wb_ack_o),
                         .wb_int_o              (wb_int_o),
                         .wb_int_o              (wb_int_o),
                         .ctrl_tx_enable        (ctrl_tx_enable),
                         .ctrl_tx_enable        (ctrl_tx_enable),
 
                         .clear_stats_tx_octets (clear_stats_tx_octets),
 
                         .clear_stats_tx_pkts   (clear_stats_tx_pkts),
 
                         .clear_stats_rx_octets (clear_stats_rx_octets),
 
                         .clear_stats_rx_pkts   (clear_stats_rx_pkts),
                         // Inputs
                         // Inputs
                         .wb_clk_i              (wb_clk_i),
                         .wb_clk_i              (wb_clk_i),
                         .wb_rst_i              (wb_rst_i),
                         .wb_rst_i              (wb_rst_i),
                         .wb_adr_i              (wb_adr_i[7:0]),
                         .wb_adr_i              (wb_adr_i[7:0]),
                         .wb_dat_i              (wb_dat_i[31:0]),
                         .wb_dat_i              (wb_dat_i[31:0]),

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