Line 92... |
Line 92... |
output [63:0] xgmii_txd; // From tx_dq0 of tx_dequeue.v
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output [63:0] xgmii_txd; // From tx_dq0 of tx_dequeue.v
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// End of automatics
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// End of automatics
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/*AUTOWIRE*/
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/*AUTOWIRE*/
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// Beginning of automatic wires (for undeclared instantiated-module outputs)
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// Beginning of automatic wires (for undeclared instantiated-module outputs)
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wire clear_stats_rx_octets; // From wishbone_if0 of wishbone_if.v
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wire clear_stats_rx_pkts; // From wishbone_if0 of wishbone_if.v
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wire clear_stats_tx_octets; // From wishbone_if0 of wishbone_if.v
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wire clear_stats_tx_pkts; // From wishbone_if0 of wishbone_if.v
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wire ctrl_tx_enable; // From wishbone_if0 of wishbone_if.v
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wire ctrl_tx_enable; // From wishbone_if0 of wishbone_if.v
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wire ctrl_tx_enable_ctx; // From sync_clk_xgmii_tx0 of sync_clk_xgmii_tx.v
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wire ctrl_tx_enable_ctx; // From sync_clk_xgmii_tx0 of sync_clk_xgmii_tx.v
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wire [1:0] local_fault_msg_det; // From rx_eq0 of rx_enqueue.v
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wire [1:0] local_fault_msg_det; // From rx_eq0 of rx_enqueue.v
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wire [1:0] remote_fault_msg_det; // From rx_eq0 of rx_enqueue.v
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wire [1:0] remote_fault_msg_det; // From rx_eq0 of rx_enqueue.v
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wire rxdfifo_ralmost_empty; // From rx_data_fifo0 of rx_data_fifo.v
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wire rxdfifo_ralmost_empty; // From rx_data_fifo0 of rx_data_fifo.v
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Line 376... |
Line 380... |
.stats_rx_octets (stats_rx_octets[31:0]),
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.stats_rx_octets (stats_rx_octets[31:0]),
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.stats_rx_pkts (stats_rx_pkts[31:0]),
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.stats_rx_pkts (stats_rx_pkts[31:0]),
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.stats_tx_octets (stats_tx_octets[31:0]),
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.stats_tx_octets (stats_tx_octets[31:0]),
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.stats_tx_pkts (stats_tx_pkts[31:0]),
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.stats_tx_pkts (stats_tx_pkts[31:0]),
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// Inputs
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// Inputs
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.clear_stats_rx_octets (clear_stats_rx_octets),
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.clear_stats_rx_pkts (clear_stats_rx_pkts),
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.clear_stats_tx_octets (clear_stats_tx_octets),
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.clear_stats_tx_pkts (clear_stats_tx_pkts),
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.clk_xgmii_rx (clk_xgmii_rx),
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.clk_xgmii_rx (clk_xgmii_rx),
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.clk_xgmii_tx (clk_xgmii_tx),
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.clk_xgmii_tx (clk_xgmii_tx),
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.reset_xgmii_rx_n (reset_xgmii_rx_n),
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.reset_xgmii_rx_n (reset_xgmii_rx_n),
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.reset_xgmii_tx_n (reset_xgmii_tx_n),
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.reset_xgmii_tx_n (reset_xgmii_tx_n),
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.rxsfifo_wdata (rxsfifo_wdata[13:0]),
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.rxsfifo_wdata (rxsfifo_wdata[13:0]),
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Line 398... |
Line 406... |
// Outputs
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// Outputs
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.wb_dat_o (wb_dat_o[31:0]),
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.wb_dat_o (wb_dat_o[31:0]),
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.wb_ack_o (wb_ack_o),
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.wb_ack_o (wb_ack_o),
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.wb_int_o (wb_int_o),
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.wb_int_o (wb_int_o),
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.ctrl_tx_enable (ctrl_tx_enable),
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.ctrl_tx_enable (ctrl_tx_enable),
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.clear_stats_tx_octets (clear_stats_tx_octets),
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.clear_stats_tx_pkts (clear_stats_tx_pkts),
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.clear_stats_rx_octets (clear_stats_rx_octets),
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.clear_stats_rx_pkts (clear_stats_rx_pkts),
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// Inputs
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// Inputs
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.wb_clk_i (wb_clk_i),
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.wb_clk_i (wb_clk_i),
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.wb_rst_i (wb_rst_i),
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.wb_rst_i (wb_rst_i),
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.wb_adr_i (wb_adr_i[7:0]),
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.wb_adr_i (wb_adr_i[7:0]),
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.wb_dat_i (wb_dat_i[31:0]),
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.wb_dat_i (wb_dat_i[31:0]),
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