| Line 169... |
Line 169... |
/*****************************************************************************************/
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/*****************************************************************************************/
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/* */
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/* */
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/* write register control: wr_sel - unencoded */
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/* write register control: wr_sel - unencoded */
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/* */
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/* */
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/*****************************************************************************************/
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/*****************************************************************************************/
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`define WREG_IDX 14
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`define WREG_IDX 16
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`define WREG_BB 15'b110000000000000 //Select B to write
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`define WREG_BB 17'b11000000000000000 //Select B to write
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`define WREG_BC 15'b111000000000000 //Select BC to write
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`define WREG_BC 17'b11100000000000000 //Select BC to write
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`define WREG_CC 15'b101000000000000 //Select C to write
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`define WREG_CC 17'b10100000000000000 //Select C to write
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`define WREG_DD 15'b100100000000000 //Select D to write
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`define WREG_DD 17'b10010000000000000 //Select D to write
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`define WREG_DE 15'b100110000000000 //Select DE to write
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`define WREG_DE 17'b10011000000000000 //Select DE to write
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`define WREG_EE 15'b100010000000000 //Select E to write
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`define WREG_EE 17'b10001000000000000 //Select E to write
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`define WREG_HH 15'b100001000000000 //Select H to write
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`define WREG_HH 17'b10000100000000000 //Select H to write
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`define WREG_HL 15'b100001100000000 //Select HL to write
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`define WREG_HL 17'b10000110000000000 //Select HL to write
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`define WREG_LL 15'b100000100000000 //Select L to write
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`define WREG_LL 17'b10000010000000000 //Select L to write
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`define WREG_DEHL 15'b100111100000000 //Select DEHL to write (ex case)
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`define WREG_DEHL 17'b10011110000000000 //Select DEHL to write (ex case)
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`define WREG_AA 15'b100000010000000 //Select A to write
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`define WREG_AA 17'b10000001000000000 //Select A to write
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`define WREG_AF 15'b100000011000000 //Select A and F to write
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`define WREG_AF 17'b10000001100000000 //Select A and F to write
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`define WREG_FF 15'b100000001000000 //Select F to write
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`define WREG_FF 17'b10000000100000000 //Select F to write
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`define WREG_SP 15'b100000000100000 //Select SP to write
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`define WREG_SP 17'b10000000010000000 //Select SP to write
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`define WREG_TMP 15'b100000000010000 //Select TMP register to write
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`define WREG_TMP 17'b10000000001000000 //Select TMP register to write
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`define WREG_IX 15'b100000000001000 //Select IX to write
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`define WREG_IXH 17'b10000000000100000 //Select IXH to write
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`define WREG_IY 15'b100000000000100 //Select IY to write
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`define WREG_IX 17'b10000000000110000 //Select IX to write
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`define WREG_II 15'b100000000000010 //Select I register to write
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`define WREG_IXL 17'b10000000000010000 //Select IXL to write
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`define WREG_RR 15'b100000000000001 //Select R register to write
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`define WREG_IYH 17'b10000000000001000 //Select IYH to write
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`define WREG_NUL 15'b000000000000000 //No register write
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`define WREG_IY 17'b10000000000001100 //Select IY to write
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`define WREG_IYL 17'b10000000000000100 //Select IYL to write
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`define WR_REG 14 //register write
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`define WREG_II 17'b10000000000000010 //Select I register to write
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`define WR_BB 13 //BB register index
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`define WREG_RR 17'b10000000000000001 //Select R register to write
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`define WR_CC 12 //CC register index
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`define WREG_NUL 17'b00000000000000000 //No register write
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`define WR_DD 11 //DD register index
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`define WR_EE 10 //EE register index
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`define WR_REG 16 //register write
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`define WR_HH 9 //HH register index
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`define WR_BB 15 //BB register index
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`define WR_LL 8 //LL register index
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`define WR_CC 14 //CC register index
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`define WR_AA 7 //AA register index
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`define WR_DD 13 //DD register index
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`define WR_FF 6 //FF register index
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`define WR_EE 12 //EE register index
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`define WR_SP 5 //SP register index
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`define WR_HH 11 //HH register index
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`define WR_TMP 4 //TMP register index
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`define WR_LL 10 //LL register index
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`define WR_IX 3 //IX register index
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`define WR_AA 9 //AA register index
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`define WR_IY 2 //IY register index
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`define WR_FF 8 //FF register index
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`define WR_SP 7 //SP register index
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`define WR_TMP 6 //TMP register index
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`define WR_IXH 5 //IXH register index
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`define WR_IXL 4 //IXL register index
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`define WR_IYH 3 //IYH register index
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`define WR_IYL 2 //IYL register index
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`define WR_II 1 //II register index
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`define WR_II 1 //II register index
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`define WR_RR 0 //RR register index
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`define WR_RR 0 //RR register index
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/*****************************************************************************************/
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/*****************************************************************************************/
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/* */
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/* */
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`define ALUOP_RR 8'b10000100 //ALU shft: rotate right
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`define ALUOP_RR 8'b10000100 //ALU shft: rotate right
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`define ALUOP_RRA 8'b10000101 //ALU shft: rotate right acc
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`define ALUOP_RRA 8'b10000101 //ALU shft: rotate right acc
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`define ALUOP_RRC 8'b10001000 //ALU shft: rotate right circular
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`define ALUOP_RRC 8'b10001000 //ALU shft: rotate right circular
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`define ALUOP_RRCA 8'b10001001 //ALU shft: rotate right circular acc
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`define ALUOP_RRCA 8'b10001001 //ALU shft: rotate right circular acc
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`define ALUOP_SLA 8'b10010000 //ALU shft: shift left arithmetic
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`define ALUOP_SLA 8'b10010000 //ALU shft: shift left arithmetic
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`define ALUOP_SLL 8'b10011000 //ALU shft: shift left logical (x = (x << 1) | 1)
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`define ALUOP_SRL 8'b10100000 //ALU shft: shift right logical
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`define ALUOP_SRL 8'b10100000 //ALU shft: shift right logical
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`define ALUOP_SRA 8'b10101000 //ALU shft: shift right arithmetic
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`define ALUOP_SRA 8'b10101000 //ALU shft: shift right arithmetic
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/*****************************************************************************************/
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/*****************************************************************************************/
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/* */
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/* */
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`define AOP_RR 6'b000100 //ALU shft: rotate right
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`define AOP_RR 6'b000100 //ALU shft: rotate right
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`define AOP_RRA 6'b000101 //ALU shft: rotate right acc
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`define AOP_RRA 6'b000101 //ALU shft: rotate right acc
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`define AOP_RRC 6'b001000 //ALU shft: rotate right circular
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`define AOP_RRC 6'b001000 //ALU shft: rotate right circular
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`define AOP_RRCA 6'b001001 //ALU shft: rotate right circular acc
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`define AOP_RRCA 6'b001001 //ALU shft: rotate right circular acc
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`define AOP_SLA 6'b010000 //ALU shft: shift left arithmetic
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`define AOP_SLA 6'b010000 //ALU shft: shift left arithmetic
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`define AOP_SLL 6'b011000 //ALU shft: shift left logical
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`define AOP_SRL 6'b100000 //ALU shft: shift right logical
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`define AOP_SRL 6'b100000 //ALU shft: shift right logical
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`define AOP_SRA 6'b101000 //ALU shft: shift right arithmetic
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`define AOP_SRA 6'b101000 //ALU shft: shift right arithmetic
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/*****************************************************************************************/
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/*****************************************************************************************/
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/* */
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/* */
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