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<h1>drv_vga Module Reference</h1> </div>
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<p><p>ADV7123 Video DAC driver for VGA output. </p>
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Inheritance diagram for drv_vga:<!-- endSectionHeader --></div>
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<p><a href="classdrv__vga-members.html">List of all members.</a></p>
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<tr><td colspan="2"><h2><a name="Always Constructs"></a>
Always Constructs</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a6b8dbc4a4fa4c34875a910e793a34e51">ALWAYS_78</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#af98d92d9fb604c7a3090d1dfebb4325b">ALWAYS_79</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a0cd5229f9236bafdc60cd75f2836d688">ALWAYS_80</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#af0c7c40cb7c77b8c759687d6362a7e17">ALWAYS_81</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
<tr><td colspan="2"><h2><a name="Defines"></a>
Defines</h2></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classdrv__vga.html#ae70561ced7c536531311b8865aa9ca5f">VGA_VIDEO_BUFFER</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">32'h10180000</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classdrv__vga.html#aba4ec979e464a3b40494f4d6aef18710">VGA_VIDEO_BUFFER_DIV_4</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">30'h04060000</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td colspan="2"><h2><a name="Inputs"></a>
Inputs</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clock and reset</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><div class="groupHeader">On-Screen-Display management interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a7c72d1d36e519c384a173325a101c738">management_mode</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#ab7f595d93fa3723c61f056ad13e4b95b">on_screen_display</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a38feb3e41812bbabd4d64c418a6fb622">character</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><div class="groupHeader">Direct drv_ssram burst read DMA video interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a6885e8a9dddd0d46eb48885c1d14104d">burst_read_ready</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#aeccacb0a76a1694e3db88b8757f934d5">burst_read_data</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">35</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><h2><a name="Outputs"></a>
Outputs</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">On-Screen-Display management interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a10a45704e7923788c0d10c21c623ac4f">osd_line</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#aa1cc640088b50fda8dd9a874d1abd909">osd_column</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><div class="groupHeader">Control signal for VGA capture</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#ad3b09207753c04efb6a28109361c0848">display_valid</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><div class="groupHeader">Direct drv_ssram burst read DMA video interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#aba05385922a89053d0ea07a6543978c1">burst_read_request</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#aa909360705ddfb7c3bddc854ddf5245b">burst_read_address</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><div class="groupHeader">ADV7123 Video DAC hardware interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#ae093cf39ab1b80814194c6eb1ab39c2f">vga_r</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#af4d7be7b44d78e0185b57899db4649d2">vga_g</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#acd92e53e6d10225e6d4aa1cc962be209">vga_b</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#af868e9c418e06b2ff0357f2e846226b3">vga_blank_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a463ddc5575768d453d2231f3dcf26738">vga_sync_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#aa7471e76f774550772ce1b69d44638d1">vga_clock</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#abb6a6625a5d411c83df0b1d3afa35a7a">vga_hsync</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__vga.html#a362ab6edf9ff37ff6f51f8c7c42a0ebf">vga_vsync</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><h2><a name="Module Instances"></a>
Module Instances</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classdrv__vga.html#a34fbd3b7c69bd1aac8f11bfd9871d808">altsyncram::line_ram_inst</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classdrv__vga.html#a73ed539019cb91cac1dba5720b142a01">altsyncram::font_rom_inst</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><h2><a name="Signals"></a>
Signals</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a5a908124ef208bf84998f7cde2c452d8">address_a</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#abada63beb55063be05d88df41af318fa">address_b</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">35</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a30f9820bf1b8cc08e21fa0d7f3a18c6c">q_b</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a22c0ae2f921e75fcc914231b378a9808">burst_read_prepare</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#ac648eff1ad8ac1f5e3e7694d7c29fdba">next_line</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#aa3178dec4eafb3c597849b728bacd928">next_counter</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a6a5fd8de78bc8bb1bd1431cd860abdf1">three_counter</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a549d46b8e788387828d20c8079bd43b9">red</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#ad523316de7108ba00362b2a092bd0d10">green</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a6eb02b3146858fd49f014815679eaa8d">blue</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a0bee1fc166ab279e572fe1fe707e3b67">line_counter_for_osd</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">10</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a4290316a2168f5ff072defe602b7287f">column_counter_for_osd</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#af55ae5aff822796b9173fcaf7c6b19ea">char_saved</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a0ec503813e34949f7668a98f504761a0">font_line</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#ae5d246022a400014c7a17bbcd0398db6">font_column</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a8f0863b6b9622cfa812f1d53ea373b2b">font</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a6b8ee2d70db3b00e0bd08671cd13b52d">font_pixel</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a1b5b5b35ae3fdd5eb40af9286ad6dc44">osd_active</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a69690878d398577f9f7e595378cda729">h_counter</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a41db336402ed59e650d7287f89e93120">v_counter</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#a9f12b95e1eefddec5a5cffcfb74dedc5">line_counter</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">10</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__vga.html#aa7e8f2c6185b5ee9f8a11def2f04e192">column_counter</a> </td></tr>
</table>
<hr/><a name="_details"></a><h2>Detailed Description</h2>
<p>ADV7123 Video DAC driver for VGA output. </p>
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00031">31</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a6b8dbc4a4fa4c34875a910e793a34e51"></a><!-- doxytag: member="drv_vga::ALWAYS_78" ref="a6b8dbc4a4fa4c34875a910e793a34e51" args="clk_30, reset_n" -->
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<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_78 <td></td>
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
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<code> [Always Construct]</code></td>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00118">118</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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</div>
<a class="anchor" id="af98d92d9fb604c7a3090d1dfebb4325b"></a><!-- doxytag: member="drv_vga::ALWAYS_79" ref="af98d92d9fb604c7a3090d1dfebb4325b" args="clk_30, reset_n" -->
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<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_79 <td></td>
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
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<code> [Always Construct]</code></td>
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</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00152">152</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="a0cd5229f9236bafdc60cd75f2836d688"></a><!-- doxytag: member="drv_vga::ALWAYS_80" ref="a0cd5229f9236bafdc60cd75f2836d688" args="clk_30, reset_n" -->
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<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_80 <td></td>
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
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<code> [Always Construct]</code></td>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00207">207</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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</div>
<a class="anchor" id="af0c7c40cb7c77b8c759687d6362a7e17"></a><!-- doxytag: member="drv_vga::ALWAYS_81" ref="af0c7c40cb7c77b8c759687d6362a7e17" args="clk_30, reset_n" -->
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<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_81 <td></td>
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
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<code> [Always Construct]</code></td>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00240">240</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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</div>
<hr/><h2>Member Data Documentation</h2>
<a class="anchor" id="a6400b0e4b90964b25c3f763e19b138d9"></a><!-- doxytag: member="drv_vga::clk_30" ref="a6400b0e4b90964b25c3f763e19b138d9" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a6400b0e4b90964b25c3f763e19b138d9">clk_30</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00034">34</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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</div>
<a class="anchor" id="a6ceec01e795fdf21d7a2ccc5b78549ab"></a><!-- doxytag: member="drv_vga::reset_n" ref="a6ceec01e795fdf21d7a2ccc5b78549ab" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a6ceec01e795fdf21d7a2ccc5b78549ab">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00035">35</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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</div>
<a class="anchor" id="a7c72d1d36e519c384a173325a101c738"></a><!-- doxytag: member="drv_vga::management_mode" ref="a7c72d1d36e519c384a173325a101c738" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a7c72d1d36e519c384a173325a101c738">management_mode</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00040">40</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="ab7f595d93fa3723c61f056ad13e4b95b"></a><!-- doxytag: member="drv_vga::on_screen_display" ref="ab7f595d93fa3723c61f056ad13e4b95b" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#ab7f595d93fa3723c61f056ad13e4b95b">on_screen_display</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00041">41</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="a10a45704e7923788c0d10c21c623ac4f"></a><!-- doxytag: member="drv_vga::osd_line" ref="a10a45704e7923788c0d10c21c623ac4f" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a10a45704e7923788c0d10c21c623ac4f">osd_line</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00042">42</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="aa1cc640088b50fda8dd9a874d1abd909"></a><!-- doxytag: member="drv_vga::osd_column" ref="aa1cc640088b50fda8dd9a874d1abd909" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aa1cc640088b50fda8dd9a874d1abd909">osd_column</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00043">43</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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</div>
<a class="anchor" id="a38feb3e41812bbabd4d64c418a6fb622"></a><!-- doxytag: member="drv_vga::character" ref="a38feb3e41812bbabd4d64c418a6fb622" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a38feb3e41812bbabd4d64c418a6fb622">character</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00044">44</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="ad3b09207753c04efb6a28109361c0848"></a><!-- doxytag: member="drv_vga::display_valid" ref="ad3b09207753c04efb6a28109361c0848" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#ad3b09207753c04efb6a28109361c0848">display_valid</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00049">49</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="aba05385922a89053d0ea07a6543978c1"></a><!-- doxytag: member="drv_vga::burst_read_request" ref="aba05385922a89053d0ea07a6543978c1" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aba05385922a89053d0ea07a6543978c1">burst_read_request</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00054">54</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="aa909360705ddfb7c3bddc854ddf5245b"></a><!-- doxytag: member="drv_vga::burst_read_address" ref="aa909360705ddfb7c3bddc854ddf5245b" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aa909360705ddfb7c3bddc854ddf5245b">burst_read_address</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00055">55</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="a6885e8a9dddd0d46eb48885c1d14104d"></a><!-- doxytag: member="drv_vga::burst_read_ready" ref="a6885e8a9dddd0d46eb48885c1d14104d" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a6885e8a9dddd0d46eb48885c1d14104d">burst_read_ready</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00056">56</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="aeccacb0a76a1694e3db88b8757f934d5"></a><!-- doxytag: member="drv_vga::burst_read_data" ref="aeccacb0a76a1694e3db88b8757f934d5" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aeccacb0a76a1694e3db88b8757f934d5">burst_read_data</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">35</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00057">57</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="ae093cf39ab1b80814194c6eb1ab39c2f"></a><!-- doxytag: member="drv_vga::vga_r" ref="ae093cf39ab1b80814194c6eb1ab39c2f" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#ae093cf39ab1b80814194c6eb1ab39c2f">vga_r</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00062">62</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="af4d7be7b44d78e0185b57899db4649d2"></a><!-- doxytag: member="drv_vga::vga_g" ref="af4d7be7b44d78e0185b57899db4649d2" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#af4d7be7b44d78e0185b57899db4649d2">vga_g</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00063">63</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="acd92e53e6d10225e6d4aa1cc962be209"></a><!-- doxytag: member="drv_vga::vga_b" ref="acd92e53e6d10225e6d4aa1cc962be209" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#acd92e53e6d10225e6d4aa1cc962be209">vga_b</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00064">64</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
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<a class="anchor" id="af868e9c418e06b2ff0357f2e846226b3"></a><!-- doxytag: member="drv_vga::vga_blank_n" ref="af868e9c418e06b2ff0357f2e846226b3" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#af868e9c418e06b2ff0357f2e846226b3">vga_blank_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00065">65</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a463ddc5575768d453d2231f3dcf26738"></a><!-- doxytag: member="drv_vga::vga_sync_n" ref="a463ddc5575768d453d2231f3dcf26738" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a463ddc5575768d453d2231f3dcf26738">vga_sync_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00066">66</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="aa7471e76f774550772ce1b69d44638d1"></a><!-- doxytag: member="drv_vga::vga_clock" ref="aa7471e76f774550772ce1b69d44638d1" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aa7471e76f774550772ce1b69d44638d1">vga_clock</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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</table>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00067">67</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="abb6a6625a5d411c83df0b1d3afa35a7a"></a><!-- doxytag: member="drv_vga::vga_hsync" ref="abb6a6625a5d411c83df0b1d3afa35a7a" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#abb6a6625a5d411c83df0b1d3afa35a7a">vga_hsync</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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</table>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00068">68</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a362ab6edf9ff37ff6f51f8c7c42a0ebf"></a><!-- doxytag: member="drv_vga::vga_vsync" ref="a362ab6edf9ff37ff6f51f8c7c42a0ebf" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a362ab6edf9ff37ff6f51f8c7c42a0ebf">vga_vsync</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00069">69</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="ae70561ced7c536531311b8865aa9ca5f"></a><!-- doxytag: member="drv_vga::VGA_VIDEO_BUFFER" ref="ae70561ced7c536531311b8865aa9ca5f" args="32'h10180000" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#ae70561ced7c536531311b8865aa9ca5f">VGA_VIDEO_BUFFER</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00073">73</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="aba4ec979e464a3b40494f4d6aef18710"></a><!-- doxytag: member="drv_vga::VGA_VIDEO_BUFFER_DIV_4" ref="aba4ec979e464a3b40494f4d6aef18710" args="30'h04060000" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aba4ec979e464a3b40494f4d6aef18710">VGA_VIDEO_BUFFER_DIV_4</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00074">74</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a5a908124ef208bf84998f7cde2c452d8"></a><!-- doxytag: member="drv_vga::address_a" ref="a5a908124ef208bf84998f7cde2c452d8" args="reg[7:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a5a908124ef208bf84998f7cde2c452d8">address_a</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[7:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00080">80</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="abada63beb55063be05d88df41af318fa"></a><!-- doxytag: member="drv_vga::address_b" ref="abada63beb55063be05d88df41af318fa" args="reg[7:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#abada63beb55063be05d88df41af318fa">address_b</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[7:0]]</code></td>
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</table>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00081">81</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a30f9820bf1b8cc08e21fa0d7f3a18c6c"></a><!-- doxytag: member="drv_vga::q_b" ref="a30f9820bf1b8cc08e21fa0d7f3a18c6c" args="wire[35:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a30f9820bf1b8cc08e21fa0d7f3a18c6c">q_b</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[35:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00082">82</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a34fbd3b7c69bd1aac8f11bfd9871d808"></a><!-- doxytag: member="drv_vga::altsyncram" ref="a34fbd3b7c69bd1aac8f11bfd9871d808" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a34fbd3b7c69bd1aac8f11bfd9871d808">altsyncram</a></span> <b><span class="vhdlchar">line_ram_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00083">83</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a22c0ae2f921e75fcc914231b378a9808"></a><!-- doxytag: member="drv_vga::burst_read_prepare" ref="a22c0ae2f921e75fcc914231b378a9808" args="wire" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a22c0ae2f921e75fcc914231b378a9808">burst_read_prepare</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00100">100</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="ac648eff1ad8ac1f5e3e7694d7c29fdba"></a><!-- doxytag: member="drv_vga::next_line" ref="ac648eff1ad8ac1f5e3e7694d7c29fdba" args="reg[8:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#ac648eff1ad8ac1f5e3e7694d7c29fdba">next_line</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[8:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00116">116</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="aa3178dec4eafb3c597849b728bacd928"></a><!-- doxytag: member="drv_vga::next_counter" ref="aa3178dec4eafb3c597849b728bacd928" args="reg[2:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aa3178dec4eafb3c597849b728bacd928">next_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[2:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00117">117</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a6a5fd8de78bc8bb1bd1431cd860abdf1"></a><!-- doxytag: member="drv_vga::three_counter" ref="a6a5fd8de78bc8bb1bd1431cd860abdf1" args="reg[1:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a6a5fd8de78bc8bb1bd1431cd860abdf1">three_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[1:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00151">151</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a549d46b8e788387828d20c8079bd43b9"></a><!-- doxytag: member="drv_vga::red" ref="a549d46b8e788387828d20c8079bd43b9" args="wire[9:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a549d46b8e788387828d20c8079bd43b9">red</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[9:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00173">173</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="ad523316de7108ba00362b2a092bd0d10"></a><!-- doxytag: member="drv_vga::green" ref="ad523316de7108ba00362b2a092bd0d10" args="wire[9:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#ad523316de7108ba00362b2a092bd0d10">green</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[9:0]]</code></td>
</tr>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00181">181</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a6eb02b3146858fd49f014815679eaa8d"></a><!-- doxytag: member="drv_vga::blue" ref="a6eb02b3146858fd49f014815679eaa8d" args="wire[9:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a6eb02b3146858fd49f014815679eaa8d">blue</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[9:0]]</code></td>
</tr>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00189">189</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a0bee1fc166ab279e572fe1fe707e3b67"></a><!-- doxytag: member="drv_vga::line_counter_for_osd" ref="a0bee1fc166ab279e572fe1fe707e3b67" args="wire[8:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a0bee1fc166ab279e572fe1fe707e3b67">line_counter_for_osd</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00198">198</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a4290316a2168f5ff072defe602b7287f"></a><!-- doxytag: member="drv_vga::column_counter_for_osd" ref="a4290316a2168f5ff072defe602b7287f" args="wire[10:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a4290316a2168f5ff072defe602b7287f">column_counter_for_osd</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[10:0]]</code></td>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00200">200</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="af55ae5aff822796b9173fcaf7c6b19ea"></a><!-- doxytag: member="drv_vga::char_saved" ref="af55ae5aff822796b9173fcaf7c6b19ea" args="reg[7:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#af55ae5aff822796b9173fcaf7c6b19ea">char_saved</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[7:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00206">206</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a0ec503813e34949f7668a98f504761a0"></a><!-- doxytag: member="drv_vga::font_line" ref="a0ec503813e34949f7668a98f504761a0" args="wire[8:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a0ec503813e34949f7668a98f504761a0">font_line</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
</tr>
</table>
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<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00213">213</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="ae5d246022a400014c7a17bbcd0398db6"></a><!-- doxytag: member="drv_vga::font_column" ref="ae5d246022a400014c7a17bbcd0398db6" args="wire[9:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#ae5d246022a400014c7a17bbcd0398db6">font_column</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[9:0]]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00216">216</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a8f0863b6b9622cfa812f1d53ea373b2b"></a><!-- doxytag: member="drv_vga::font" ref="a8f0863b6b9622cfa812f1d53ea373b2b" args="wire[7:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a8f0863b6b9622cfa812f1d53ea373b2b">font</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[7:0]]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00219">219</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a73ed539019cb91cac1dba5720b142a01"></a><!-- doxytag: member="drv_vga::altsyncram" ref="a73ed539019cb91cac1dba5720b142a01" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a73ed539019cb91cac1dba5720b142a01">altsyncram</a></span> <b><span class="vhdlchar">font_rom_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00220">220</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a6b8ee2d70db3b00e0bd08671cd13b52d"></a><!-- doxytag: member="drv_vga::font_pixel" ref="a6b8ee2d70db3b00e0bd08671cd13b52d" args="wire" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a6b8ee2d70db3b00e0bd08671cd13b52d">font_pixel</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00230">230</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a1b5b5b35ae3fdd5eb40af9286ad6dc44"></a><!-- doxytag: member="drv_vga::osd_active" ref="a1b5b5b35ae3fdd5eb40af9286ad6dc44" args="wire" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a1b5b5b35ae3fdd5eb40af9286ad6dc44">osd_active</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00233">233</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a69690878d398577f9f7e595378cda729"></a><!-- doxytag: member="drv_vga::h_counter" ref="a69690878d398577f9f7e595378cda729" args="reg[9:0]" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a69690878d398577f9f7e595378cda729">h_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[9:0]]</code></td>
</tr>
</table>
</div>
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<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00238">238</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a41db336402ed59e650d7287f89e93120"></a><!-- doxytag: member="drv_vga::v_counter" ref="a41db336402ed59e650d7287f89e93120" args="reg[8:0]" -->
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<table class="memname">
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<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a41db336402ed59e650d7287f89e93120">v_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[8:0]]</code></td>
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</table>
</div>
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<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00239">239</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="a9f12b95e1eefddec5a5cffcfb74dedc5"></a><!-- doxytag: member="drv_vga::line_counter" ref="a9f12b95e1eefddec5a5cffcfb74dedc5" args="wire[8:0]" -->
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<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#a9f12b95e1eefddec5a5cffcfb74dedc5">line_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[8:0]]</code></td>
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</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00259">259</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<a class="anchor" id="aa7e8f2c6185b5ee9f8a11def2f04e192"></a><!-- doxytag: member="drv_vga::column_counter" ref="aa7e8f2c6185b5ee9f8a11def2f04e192" args="wire[10:0]" -->
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<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classdrv__vga.html#aa7e8f2c6185b5ee9f8a11def2f04e192">column_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[10:0]]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="drv__vga_8v_source.html#l00262">262</a> of file <a class="el" href="drv__vga_8v_source.html">drv_vga.v</a>.</p>
</div>
</div>
<hr/>The documentation for this class was generated from the following file:<ul>
<li><a class="el" href="drv__vga_8v_source.html">drv_vga.v</a></li>
</ul>
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<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by 
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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