URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [wishbone/] [ip/] [wb_memory/] [sim/] [testbenches/] [xml/] [wb_memory_bfm.design.xml] - Rev 135
Compare with Previous | Blame | View Log
<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2010 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
<ipxact:design
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>wishbone</ipxact:library>
<ipxact:name>wb_memory</ipxact:name>
<ipxact:version>bfm.design</ipxact:version>
<ipxact:adHocConnections>
<ipxact:adHocConnection>
<ipxact:name>clk_i</ipxact:name>
<ipxact:externalPortReference portRef="slave_clk_clk"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="clk"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>reset</ipxact:name>
<ipxact:externalPortReference portRef="reset"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="reset"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>adr_i</ipxact:name>
<ipxact:externalPortReference portRef="adr_i" left="wb_addr_width-1" right="0"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="adr"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>dat_o</ipxact:name>
<ipxact:externalPortReference portRef="dat_o" left="wb_data_width-1" right="0" />
<ipxact:internalPortReference componentRef="i_wb_master" portRef="din"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>dat_i</ipxact:name>
<ipxact:externalPortReference portRef="dat_i" left="wb_data_width-1" right="0" />
<ipxact:internalPortReference componentRef="i_wb_master" portRef="dout"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>ack_o</ipxact:name>
<ipxact:externalPortReference portRef="ack_o"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="ack"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>sel_i</ipxact:name>
<ipxact:externalPortReference portRef="sel_i" left="wb_byte_lanes-1" right="0" />
<ipxact:internalPortReference componentRef="i_wb_master" portRef="sel"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>stb_i</ipxact:name>
<ipxact:externalPortReference portRef="stb_i"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="stb"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>cyc_i</ipxact:name>
<ipxact:externalPortReference portRef="cyc_i"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="cyc"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>we_i</ipxact:name>
<ipxact:externalPortReference portRef="we_i"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="we"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection tiedValue="1'b0" >
<ipxact:internalPortReference componentRef="i_wb_master" portRef="err"/>
<ipxact:internalPortReference componentRef="i_wb_master" portRef="rty"/>
</ipxact:adHocConnection>
</ipxact:adHocConnections>
<ipxact:componentInstances>
<ipxact:componentInstance>
<ipxact:instanceName>i_wb_master</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="wishbone" name="model" version="master" />
<ipxact:configurableElementValues>
<ipxact:configurableElementValue referenceId="dwidth">wb_data_width</ipxact:configurableElementValue>
<ipxact:configurableElementValue referenceId="awidth">wb_addr_width</ipxact:configurableElementValue>
</ipxact:configurableElementValues>
</ipxact:componentInstance>
</ipxact:componentInstances>
</ipxact:design>