Subversion Repositories usimplez

Analysis & Synthesis Status : Successful - Wed Nov 09 11:45:57 2011
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
Revision Name : usimplez_top
Top-level Entity Name : usimplez_top
Family : Stratix II
Logic utilization : N/A
    Combinational ALUTs : 48
    Dedicated logic registers : 63
Total registers : 63
Total pins : 7
Total virtual pins : 0
Total block memory bits : 6,144
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0