URL
https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
Subversion Repositories 6809_6309_compatible_core
[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [P6809/] [P6809_P6809_map.hrr] - Rev 9
Go to most recent revision | Compare with Previous | Blame | View Log
---------------------------------------------------
Report for cell CC3_top
Instance path: CC3_top
Cell usage:
cell count Res Usage(%)
SLIC 1218.00 100.0
IOLGC 10.00 100.0
LUT4 2043.00 100.0
IOREG 10 100.0
IOBUF 49 100.0
PFUREG 429 100.0
RIPPLE 196 100.0
EBR 10 100.0
SUB MODULES
cell count SLC Usage(%)
vgatext 1 7.1
bios2k 1 0.0
MC6809_cpu 1 92.7
---------------------------------------------------
Report for cell vgatext
Instance path: CC3_top/textctrl
Cell usage:
cell count Res Usage(%)
SLIC 87.00 7.1
LUT4 100.00 4.9
PFUREG 80 18.6
RIPPLE 36 18.4
EBR 8 80.0
SUB MODULES
cell count SLC Usage(%)
textmem4k 1 0.1
fontrom 1 0.0
---------------------------------------------------
Report for cell textmem4k
Instance path: CC3_top/textctrl/chars
Cell usage:
cell count Res Usage(%)
SLIC 1.75 0.1
LUT4 7.00 0.3
EBR 4 40.0
---------------------------------------------------
Report for cell fontrom
Instance path: CC3_top/textctrl/font
Cell usage:
cell count Res Usage(%)
EBR 4 40.0
---------------------------------------------------
Report for cell bios2k
Instance path: CC3_top/bios
Cell usage:
cell count Res Usage(%)
EBR 2 20.0
---------------------------------------------------
Report for cell MC6809_cpu
Instance path: CC3_top/cpu0
Cell usage:
cell count Res Usage(%)
SLIC 1129.33 92.7
LUT4 1942.00 95.1
PFUREG 344 80.2
RIPPLE 160 81.6
SUB MODULES
cell count SLC Usage(%)
test_condition 1 0.8
regblock 1 39.4
decode_op 1 6.8
decode_regs 1 10.9
decode_alu 1 2.6
decode_ea 1 0.4
alu 1 27.0
---------------------------------------------------
Report for cell test_condition
Instance path: CC3_top/cpu0/test_cond
Cell usage:
cell count Res Usage(%)
SLIC 10.08 0.8
LUT4 21.00 1.0
---------------------------------------------------
Report for cell decode_alu
Instance path: CC3_top/cpu0/dec_alu
Cell usage:
cell count Res Usage(%)
SLIC 31.83 2.6
LUT4 66.50 3.3
---------------------------------------------------
Report for cell decode_ea
Instance path: CC3_top/cpu0/dec_ea
Cell usage:
cell count Res Usage(%)
SLIC 4.67 0.4
LUT4 9.50 0.5
---------------------------------------------------
Report for cell decode_op
Instance path: CC3_top/cpu0/dec_op
Cell usage:
cell count Res Usage(%)
SLIC 82.83 6.8
LUT4 175.00 8.6
---------------------------------------------------
Report for cell decode_regs
Instance path: CC3_top/cpu0/dec_regs
Cell usage:
cell count Res Usage(%)
SLIC 132.88 10.9
LUT4 275.50 13.5
PFUREG 12 2.8
---------------------------------------------------
Report for cell regblock
Instance path: CC3_top/cpu0/regs
Cell usage:
cell count Res Usage(%)
SLIC 480.22 39.4
LUT4 897.50 43.9
PFUREG 112 26.1
RIPPLE 54 27.6
SUB MODULES
cell count SLC Usage(%)
calc_ea 1 9.8
---------------------------------------------------
Report for cell calc_ea
Instance path: CC3_top/cpu0/regs/ea
Cell usage:
cell count Res Usage(%)
SLIC 118.98 9.8
LUT4 193.50 9.5
RIPPLE 27 13.8
---------------------------------------------------
Report for cell alu
Instance path: CC3_top/cpu0/alu
Cell usage:
cell count Res Usage(%)
SLIC 329.00 27.0
LUT4 463.00 22.7
PFUREG 81 18.9
RIPPLE 97 49.5
SUB MODULES
cell count SLC Usage(%)
alu16 1 14.3
alu8 1 9.6
---------------------------------------------------
Report for cell alu16
Instance path: CC3_top/cpu0/alu/alu16
Cell usage:
cell count Res Usage(%)
SLIC 173.95 14.3
LUT4 208.83 10.2
PFUREG 44 10.3
RIPPLE 72 36.7
SUB MODULES
cell count SLC Usage(%)
mul8x8 1 6.0
arith16 1 4.7
---------------------------------------------------
Report for cell arith16
Instance path: CC3_top/cpu0/alu/alu16/a16
Cell usage:
cell count Res Usage(%)
SLIC 56.70 4.7
LUT4 44.50 2.2
RIPPLE 36 18.4
---------------------------------------------------
Report for cell mul8x8
Instance path: CC3_top/cpu0/alu/alu16/mulu
Cell usage:
cell count Res Usage(%)
SLIC 73.58 6.0
LUT4 75.00 3.7
PFUREG 42 9.8
RIPPLE 36 18.4
---------------------------------------------------
Report for cell alu8
Instance path: CC3_top/cpu0/alu/alu8
Cell usage:
cell count Res Usage(%)
SLIC 117.28 9.6
LUT4 192.33 9.4
RIPPLE 25 12.8
SUB MODULES
cell count SLC Usage(%)
shift8 1 0.4
logic8 1 0.4
arith8 1 3.3
---------------------------------------------------
Report for cell shift8
Instance path: CC3_top/cpu0/alu/alu8/s8
Cell usage:
cell count Res Usage(%)
SLIC 4.67 0.4
LUT4 10.00 0.5
---------------------------------------------------
Report for cell arith8
Instance path: CC3_top/cpu0/alu/alu8/a8
Cell usage:
cell count Res Usage(%)
SLIC 39.75 3.3
LUT4 41.00 2.0
RIPPLE 20 10.2
---------------------------------------------------
Report for cell logic8
Instance path: CC3_top/cpu0/alu/alu8/l8
Cell usage:
cell count Res Usage(%)
SLIC 4.67 0.4
LUT4 9.33 0.5
Go to most recent revision | Compare with Previous | Blame | View Log